forked from luck/tmp_suning_uos_patched
1dc91c3eb3
On FSL Book-E devices we support multiple large TLB sizes and so we can get into situations in which the initial 1G TLB size is too big and we're asked for a size that is not mappable by a single entry (like 512M). The single entry is important because when we bring up secondary cores they need to ensure any data structure they need to access (eg PACA or stack) is always mapped. So we really need to determine what size will actually be mapped by the first TLB entry to ensure we limit early memory references to that region. We refactor the map_mem_in_cams() code to provider a helper function that we can utilize to determine the size of the first TLB entry while taking into account size and alignment constraints. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
166 lines
4.6 KiB
C
166 lines
4.6 KiB
C
/*
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* Declarations of procedures and variables shared between files
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* in arch/ppc/mm/.
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*
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* Derived from arch/ppc/mm/init.c:
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/mm.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu.h>
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#ifdef CONFIG_PPC_MMU_NOHASH
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/*
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* On 40x and 8xx, we directly inline tlbia and tlbivax
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*/
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#if defined(CONFIG_40x) || defined(CONFIG_8xx)
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static inline void _tlbil_all(void)
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{
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asm volatile ("sync; tlbia; isync" : : : "memory");
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}
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static inline void _tlbil_pid(unsigned int pid)
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{
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asm volatile ("sync; tlbia; isync" : : : "memory");
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}
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#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
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#else /* CONFIG_40x || CONFIG_8xx */
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extern void _tlbil_all(void);
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extern void _tlbil_pid(unsigned int pid);
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#ifdef CONFIG_PPC_BOOK3E
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extern void _tlbil_pid_noind(unsigned int pid);
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#else
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#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
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#endif
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#endif /* !(CONFIG_40x || CONFIG_8xx) */
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/*
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* On 8xx, we directly inline tlbie, on others, it's extern
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*/
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#ifdef CONFIG_8xx
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static inline void _tlbil_va(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind)
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{
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asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
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}
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#elif defined(CONFIG_PPC_BOOK3E)
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extern void _tlbil_va(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind);
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#else
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extern void __tlbil_va(unsigned long address, unsigned int pid);
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static inline void _tlbil_va(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind)
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{
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__tlbil_va(address, pid);
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}
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#endif /* CONIFG_8xx */
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#if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x)
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extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind);
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#else
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static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
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unsigned int tsize, unsigned int ind)
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{
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BUG();
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}
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#endif
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#else /* CONFIG_PPC_MMU_NOHASH */
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extern void hash_preload(struct mm_struct *mm, unsigned long ea,
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unsigned long access, unsigned long trap);
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extern void _tlbie(unsigned long address);
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extern void _tlbia(void);
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#endif /* CONFIG_PPC_MMU_NOHASH */
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#ifdef CONFIG_PPC32
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extern void mapin_ram(void);
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extern int map_page(unsigned long va, phys_addr_t pa, int flags);
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extern void setbat(int index, unsigned long virt, phys_addr_t phys,
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unsigned int size, int flags);
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extern int __map_without_bats;
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extern int __allow_ioremap_reserved;
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extern unsigned long ioremap_base;
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extern unsigned int rtas_data, rtas_size;
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struct hash_pte;
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extern struct hash_pte *Hash, *Hash_end;
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extern unsigned long Hash_size, Hash_mask;
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#endif /* CONFIG_PPC32 */
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#ifdef CONFIG_PPC64
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extern int map_kernel_page(unsigned long ea, unsigned long pa, int flags);
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#endif /* CONFIG_PPC64 */
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extern unsigned long ioremap_bot;
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extern unsigned long __max_low_memory;
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extern phys_addr_t __initial_memory_limit_addr;
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extern phys_addr_t total_memory;
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extern phys_addr_t total_lowmem;
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extern phys_addr_t memstart_addr;
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extern phys_addr_t lowmem_end_addr;
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#ifdef CONFIG_WII
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extern unsigned long wii_hole_start;
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extern unsigned long wii_hole_size;
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extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
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extern void wii_memory_fixups(void);
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#endif
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/* ...and now those things that may be slightly different between processor
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* architectures. -- Dan
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*/
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#if defined(CONFIG_8xx)
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#define MMU_init_hw() do { } while(0)
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#define mmu_mapin_ram(top) (0UL)
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#elif defined(CONFIG_4xx)
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extern void MMU_init_hw(void);
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extern unsigned long mmu_mapin_ram(unsigned long top);
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#elif defined(CONFIG_PPC_FSL_BOOK3E)
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extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx);
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extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
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phys_addr_t phys);
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#ifdef CONFIG_PPC32
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extern void MMU_init_hw(void);
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extern unsigned long mmu_mapin_ram(unsigned long top);
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extern void adjust_total_lowmem(void);
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#endif
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extern void loadcam_entry(unsigned int index);
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struct tlbcam {
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u32 MAS0;
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u32 MAS1;
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unsigned long MAS2;
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u32 MAS3;
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u32 MAS7;
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};
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#elif defined(CONFIG_PPC32)
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/* anything 32-bit except 4xx or 8xx */
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extern void MMU_init_hw(void);
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extern unsigned long mmu_mapin_ram(unsigned long top);
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#endif
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