Thierry Reding 63cc5a4da1 clk: tegra: Model oscillator as clock ... Currently the Tegra clock driver simplifies the clock tree somewhat by taking advantage of the fact that clk_m runs at the same frequency as the oscillator. While that's true on all currently supported SoCs, it does not apply to Tegra210 anymore. On Tegra210 clk_m is typically divided down from the oscillator frequency. To support that setup, add a separate clock for the oscillator that both clk_m and pll_ref derive from. Modify the tegra_osc_clk_init() function to take an additional divider parameter for clk_m. Existing SoCs always pass in 1, whereas Tegra210 will read the divider from a register in the clock & reset controller. Signed-off-by: Thierry Reding <treding@nvidia.com>		2015-04-10 16:04:20 +02:00
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at91	The clock framework changes for 3.20 contain the usual driver additions,	2015-02-21 12:30:30 -08:00
bcm	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
berlin	clk: berlin: bg2q: remove non-exist "smemc" gate clock	2015-01-13 10:58:43 -08:00
hisilicon	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
keystone
mmp	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
mvebu	clk: mvebu: add suspend/resume for gatable clocks	2014-11-30 16:40:12 +00:00
mxs	Revert "clk: mxs: Fix invalid 32-bit access to frac registers"	2015-02-18 10:13:26 -08:00
pxa	clk: Replace explicit clk assignment with __clk_hw_set_clk	2015-02-18 09:40:11 -08:00
qcom	clk: Add rate constraints to clocks	2015-02-02 14:23:42 -08:00
rockchip	The clock framework changes for 3.20 contain the usual driver additions,	2015-02-21 12:30:30 -08:00
samsung	The clock framework changes for 3.20 contain the usual driver additions,	2015-02-21 12:30:30 -08:00
shmobile	The clock framework changes for 3.20 contain the usual driver additions,	2015-02-21 12:30:30 -08:00
sirf
socfpga
spear
st	clk: Replace explicit clk assignment with __clk_hw_set_clk	2015-02-18 09:40:11 -08:00
sunxi	The clock framework changes for 3.20 contain the usual driver additions,	2015-02-21 12:30:30 -08:00
tegra	clk: tegra: Model oscillator as clock	2015-04-10 16:04:20 +02:00
ti	clk: omap: compile legacy omap3 clocks conditionally	2015-02-03 11:06:11 -08:00
ux500	clk: ux500: Drop use of clk-private.h	2015-01-27 11:56:33 -08:00
versatile	ARM: vexpress: Remove non-DT code	2014-11-28 16:08:16 +01:00
x86
zynq	clk: zynq: Force CPU_2X clock to be ungated	2015-01-27 17:00:24 -08:00
clk-asm9260.c	ARM: clk: add clk-asm9260 driver	2015-01-20 10:10:51 -08:00
clk-axi-clkgen.c
clk-axm5516.c
clk-bcm2835.c
clk-cdce706.c	clk: TI CDCE706 clock synthesizer driver	2015-01-17 13:52:40 -08:00
clk-clps711x.c
clk-composite.c	clk: Replace explicit clk assignment with __clk_hw_set_clk	2015-02-18 09:40:11 -08:00
clk-conf.c
clk-devres.c
clk-divider.c	clk: divider: Make generic for usage elsewhere	2015-01-27 11:48:52 -08:00
clk-efm32gg.c
clk-fixed-factor.c
clk-fixed-rate.c
clk-fractional-divider.c
clk-gate.c	clk-gate: fix bit # check in clk_register_gate()	2015-01-20 10:09:05 -08:00
clk-gpio-gate.c
clk-highbank.c
clk-ls1x.c
clk-max77686.c
clk-max77802.c
clk-max-gen.c
clk-max-gen.h
clk-moxart.c
clk-mux.c	clk: Add clk_unregister_{divider, gate, mux} to close memory leak	2015-01-17 13:52:41 -08:00
clk-nomadik.c
clk-nspire.c
clk-palmas.c
clk-qoriq.c	clk: qoriq: Add support for the platform PLL	2015-02-18 09:56:43 -08:00
clk-rk808.c
clk-s2mps11.c	Please consider pulling the clk framework changes toward 3.19. It is	2014-12-20 16:42:36 -08:00
clk-si570.c
clk-si5351.c
clk-si5351.h
clk-twl6040.c
clk-u300.c
clk-vt8500.c
clk-wm831x.c
clk-xgene.c
clk.c	The clock framework changes for 3.20 contain the usual driver additions,	2015-02-21 12:30:30 -08:00
clk.h	clkdev: Always allocate a struct clk and call __clk_get() w/ CCF	2015-02-06 17:53:20 -08:00
clkdev.c	clkdev: Always allocate a struct clk and call __clk_get() w/ CCF	2015-02-06 17:53:20 -08:00
Kconfig	The clock framework changes for 3.20 contain the usual driver additions,	2015-02-21 12:30:30 -08:00
Makefile	ARM: clk: add clk-asm9260 driver	2015-01-20 10:10:51 -08:00