forked from luck/tmp_suning_uos_patched
6551881c86
/sys/class/watchdog/watchdogn/device/modalias can help to identify the driver/module for a given watchdog node. However, many wdt devices do not set their parent and so, we do not see an entry for device in sysfs for such devices. This patch fixes parent of watchdog_device so that /sys/class/watchdog/watchdogn/device is populated. Exceptions: booke, diag288, octeon, softdog and w83627hf -- They do not have any parent. Not sure, how we can identify driver for these devices. Signed-off-by: Pratyush Anand <panand@redhat.com> Reviewed-by: Johannes Thumshirn <jthumshirn@suse.de> Acked-by: Guenter Roeck <linux@roeck-us.net> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Maxime Coquelin <maxime.coquelin@st.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
235 lines
6.0 KiB
C
235 lines
6.0 KiB
C
/*
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* drivers/char/watchdog/pnx4008_wdt.c
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*
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* Watchdog driver for PNX4008 board
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*
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* Authors: Dmitry Chigirev <source@mvista.com>,
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* Vitaly Wool <vitalywool@gmail.com>
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* Based on sa1100 driver,
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* Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
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*
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* 2005-2006 (c) MontaVista Software, Inc.
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*
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* (C) 2012 Wolfram Sang, Pengutronix
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/watchdog.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <mach/hardware.h>
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/* WatchDog Timer - Chapter 23 Page 207 */
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#define DEFAULT_HEARTBEAT 19
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#define MAX_HEARTBEAT 60
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/* Watchdog timer register set definition */
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#define WDTIM_INT(p) ((p) + 0x0)
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#define WDTIM_CTRL(p) ((p) + 0x4)
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#define WDTIM_COUNTER(p) ((p) + 0x8)
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#define WDTIM_MCTRL(p) ((p) + 0xC)
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#define WDTIM_MATCH0(p) ((p) + 0x10)
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#define WDTIM_EMR(p) ((p) + 0x14)
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#define WDTIM_PULSE(p) ((p) + 0x18)
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#define WDTIM_RES(p) ((p) + 0x1C)
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/* WDTIM_INT bit definitions */
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#define MATCH_INT 1
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/* WDTIM_CTRL bit definitions */
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#define COUNT_ENAB 1
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#define RESET_COUNT (1 << 1)
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#define DEBUG_EN (1 << 2)
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/* WDTIM_MCTRL bit definitions */
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#define MR0_INT 1
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#undef RESET_COUNT0
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#define RESET_COUNT0 (1 << 2)
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#define STOP_COUNT0 (1 << 2)
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#define M_RES1 (1 << 3)
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#define M_RES2 (1 << 4)
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#define RESFRC1 (1 << 5)
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#define RESFRC2 (1 << 6)
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/* WDTIM_EMR bit definitions */
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#define EXT_MATCH0 1
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#define MATCH_OUTPUT_HIGH (2 << 4) /*a MATCH_CTRL setting */
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/* WDTIM_RES bit definitions */
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#define WDOG_RESET 1 /* read only */
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#define WDOG_COUNTER_RATE 13000000 /*the counter clock is 13 MHz fixed */
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static bool nowayout = WATCHDOG_NOWAYOUT;
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static unsigned int heartbeat = DEFAULT_HEARTBEAT;
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static DEFINE_SPINLOCK(io_lock);
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static void __iomem *wdt_base;
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struct clk *wdt_clk;
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static int pnx4008_wdt_start(struct watchdog_device *wdd)
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{
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spin_lock(&io_lock);
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/* stop counter, initiate counter reset */
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writel(RESET_COUNT, WDTIM_CTRL(wdt_base));
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/*wait for reset to complete. 100% guarantee event */
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while (readl(WDTIM_COUNTER(wdt_base)))
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cpu_relax();
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/* internal and external reset, stop after that */
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writel(M_RES2 | STOP_COUNT0 | RESET_COUNT0, WDTIM_MCTRL(wdt_base));
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/* configure match output */
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writel(MATCH_OUTPUT_HIGH, WDTIM_EMR(wdt_base));
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/* clear interrupt, just in case */
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writel(MATCH_INT, WDTIM_INT(wdt_base));
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/* the longest pulse period 65541/(13*10^6) seconds ~ 5 ms. */
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writel(0xFFFF, WDTIM_PULSE(wdt_base));
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writel(wdd->timeout * WDOG_COUNTER_RATE, WDTIM_MATCH0(wdt_base));
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/*enable counter, stop when debugger active */
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writel(COUNT_ENAB | DEBUG_EN, WDTIM_CTRL(wdt_base));
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spin_unlock(&io_lock);
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return 0;
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}
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static int pnx4008_wdt_stop(struct watchdog_device *wdd)
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{
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spin_lock(&io_lock);
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writel(0, WDTIM_CTRL(wdt_base)); /*stop counter */
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spin_unlock(&io_lock);
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return 0;
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}
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static int pnx4008_wdt_set_timeout(struct watchdog_device *wdd,
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unsigned int new_timeout)
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{
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wdd->timeout = new_timeout;
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return 0;
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}
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static const struct watchdog_info pnx4008_wdt_ident = {
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.options = WDIOF_CARDRESET | WDIOF_MAGICCLOSE |
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WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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.identity = "PNX4008 Watchdog",
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};
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static const struct watchdog_ops pnx4008_wdt_ops = {
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.owner = THIS_MODULE,
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.start = pnx4008_wdt_start,
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.stop = pnx4008_wdt_stop,
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.set_timeout = pnx4008_wdt_set_timeout,
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};
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static struct watchdog_device pnx4008_wdd = {
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.info = &pnx4008_wdt_ident,
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.ops = &pnx4008_wdt_ops,
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.timeout = DEFAULT_HEARTBEAT,
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.min_timeout = 1,
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.max_timeout = MAX_HEARTBEAT,
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};
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static int pnx4008_wdt_probe(struct platform_device *pdev)
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{
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struct resource *r;
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int ret = 0;
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watchdog_init_timeout(&pnx4008_wdd, heartbeat, &pdev->dev);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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wdt_base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(wdt_base))
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return PTR_ERR(wdt_base);
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wdt_clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(wdt_clk))
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return PTR_ERR(wdt_clk);
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ret = clk_enable(wdt_clk);
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if (ret)
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return ret;
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pnx4008_wdd.bootstatus = (readl(WDTIM_RES(wdt_base)) & WDOG_RESET) ?
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WDIOF_CARDRESET : 0;
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pnx4008_wdd.parent = &pdev->dev;
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watchdog_set_nowayout(&pnx4008_wdd, nowayout);
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pnx4008_wdt_stop(&pnx4008_wdd); /* disable for now */
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ret = watchdog_register_device(&pnx4008_wdd);
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if (ret < 0) {
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dev_err(&pdev->dev, "cannot register watchdog device\n");
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goto disable_clk;
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}
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dev_info(&pdev->dev, "PNX4008 Watchdog Timer: heartbeat %d sec\n",
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pnx4008_wdd.timeout);
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return 0;
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disable_clk:
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clk_disable(wdt_clk);
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return ret;
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}
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static int pnx4008_wdt_remove(struct platform_device *pdev)
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{
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watchdog_unregister_device(&pnx4008_wdd);
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clk_disable(wdt_clk);
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return 0;
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}
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#ifdef CONFIG_OF
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static const struct of_device_id pnx4008_wdt_match[] = {
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{ .compatible = "nxp,pnx4008-wdt" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, pnx4008_wdt_match);
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#endif
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static struct platform_driver platform_wdt_driver = {
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.driver = {
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.name = "pnx4008-watchdog",
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.of_match_table = of_match_ptr(pnx4008_wdt_match),
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},
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.probe = pnx4008_wdt_probe,
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.remove = pnx4008_wdt_remove,
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};
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module_platform_driver(platform_wdt_driver);
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MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
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MODULE_AUTHOR("Wolfram Sang <kernel@pengutronix.de>");
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MODULE_DESCRIPTION("PNX4008 Watchdog Driver");
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module_param(heartbeat, uint, 0);
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MODULE_PARM_DESC(heartbeat,
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"Watchdog heartbeat period in seconds from 1 to "
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__MODULE_STRING(MAX_HEARTBEAT) ", default "
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__MODULE_STRING(DEFAULT_HEARTBEAT));
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module_param(nowayout, bool, 0);
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MODULE_PARM_DESC(nowayout,
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"Set to 1 to keep watchdog running after device release");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:pnx4008-watchdog");
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