forked from luck/tmp_suning_uos_patched
68db30472d
also, dont bother using memcpy since we can just do an assignment of the same structure. Signed-off-by: Mike Frysinger <michael.frysinger@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Acked-by: Alessandro Zummo <alessandro.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
450 lines
12 KiB
C
450 lines
12 KiB
C
/*
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* Blackfin On-Chip Real Time Clock Driver
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* Supports BF53[123]/BF53[467]/BF54[2489]
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*
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* Copyright 2004-2007 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*/
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/* The biggest issue we deal with in this driver is that register writes are
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* synced to the RTC frequency of 1Hz. So if you write to a register and
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* attempt to write again before the first write has completed, the new write
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* is simply discarded. This can easily be troublesome if userspace disables
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* one event (say periodic) and then right after enables an event (say alarm).
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* Since all events are maintained in the same interrupt mask register, if
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* we wrote to it to disable the first event and then wrote to it again to
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* enable the second event, that second event would not be enabled as the
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* write would be discarded and things quickly fall apart.
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*
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* To keep this delay from significantly degrading performance (we, in theory,
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* would have to sleep for up to 1 second everytime we wanted to write a
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* register), we only check the write pending status before we start to issue
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* a new write. We bank on the idea that it doesnt matter when the sync
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* happens so long as we don't attempt another write before it does. The only
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* time userspace would take this penalty is when they try and do multiple
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* operations right after another ... but in this case, they need to take the
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* sync penalty, so we should be OK.
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*
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* Also note that the RTC_ISTAT register does not suffer this penalty; its
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* writes to clear status registers complete immediately.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/bcd.h>
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#include <linux/rtc.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/spinlock.h>
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#include <linux/delay.h>
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#include <asm/blackfin.h>
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#define dev_dbg_stamp(dev) dev_dbg(dev, "%s:%i: here i am\n", __func__, __LINE__)
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struct bfin_rtc {
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struct rtc_device *rtc_dev;
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struct rtc_time rtc_alarm;
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spinlock_t lock;
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};
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/* Bit values for the ISTAT / ICTL registers */
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#define RTC_ISTAT_WRITE_COMPLETE 0x8000
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#define RTC_ISTAT_WRITE_PENDING 0x4000
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#define RTC_ISTAT_ALARM_DAY 0x0040
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#define RTC_ISTAT_24HR 0x0020
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#define RTC_ISTAT_HOUR 0x0010
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#define RTC_ISTAT_MIN 0x0008
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#define RTC_ISTAT_SEC 0x0004
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#define RTC_ISTAT_ALARM 0x0002
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#define RTC_ISTAT_STOPWATCH 0x0001
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/* Shift values for RTC_STAT register */
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#define DAY_BITS_OFF 17
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#define HOUR_BITS_OFF 12
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#define MIN_BITS_OFF 6
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#define SEC_BITS_OFF 0
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/* Some helper functions to convert between the common RTC notion of time
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* and the internal Blackfin notion that is encoded in 32bits.
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*/
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static inline u32 rtc_time_to_bfin(unsigned long now)
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{
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u32 sec = (now % 60);
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u32 min = (now % (60 * 60)) / 60;
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u32 hour = (now % (60 * 60 * 24)) / (60 * 60);
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u32 days = (now / (60 * 60 * 24));
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return (sec << SEC_BITS_OFF) +
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(min << MIN_BITS_OFF) +
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(hour << HOUR_BITS_OFF) +
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(days << DAY_BITS_OFF);
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}
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static inline unsigned long rtc_bfin_to_time(u32 rtc_bfin)
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{
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return (((rtc_bfin >> SEC_BITS_OFF) & 0x003F)) +
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(((rtc_bfin >> MIN_BITS_OFF) & 0x003F) * 60) +
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(((rtc_bfin >> HOUR_BITS_OFF) & 0x001F) * 60 * 60) +
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(((rtc_bfin >> DAY_BITS_OFF) & 0x7FFF) * 60 * 60 * 24);
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}
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static inline void rtc_bfin_to_tm(u32 rtc_bfin, struct rtc_time *tm)
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{
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rtc_time_to_tm(rtc_bfin_to_time(rtc_bfin), tm);
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}
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/* Wait for the previous write to a RTC register to complete.
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* Unfortunately, we can't sleep here as that introduces a race condition when
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* turning on interrupt events. Consider this:
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* - process sets alarm
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* - process enables alarm
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* - process sleeps while waiting for rtc write to sync
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* - interrupt fires while process is sleeping
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* - interrupt acks the event by writing to ISTAT
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* - interrupt sets the WRITE PENDING bit
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* - interrupt handler finishes
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* - process wakes up, sees WRITE PENDING bit set, goes to sleep
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* - interrupt fires while process is sleeping
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* If anyone can point out the obvious solution here, i'm listening :). This
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* shouldn't be an issue on an SMP or preempt system as this function should
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* only be called with the rtc lock held.
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*
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* Other options:
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* - disable PREN so the sync happens at 32.768kHZ ... but this changes the
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* inc rate for all RTC registers from 1HZ to 32.768kHZ ...
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* - use the write complete IRQ
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*/
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static void rtc_bfin_sync_pending(void)
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{
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while (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_COMPLETE)) {
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if (!(bfin_read_RTC_ISTAT() & RTC_ISTAT_WRITE_PENDING))
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break;
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}
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bfin_write_RTC_ISTAT(RTC_ISTAT_WRITE_COMPLETE);
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}
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static void rtc_bfin_reset(struct device *dev)
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{
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struct bfin_rtc *rtc = dev_get_drvdata(dev);
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/* Initialize the RTC. Enable pre-scaler to scale RTC clock
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* to 1Hz and clear interrupt/status registers. */
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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bfin_write_RTC_PREN(0x1);
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bfin_write_RTC_ICTL(0);
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bfin_write_RTC_SWCNT(0);
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bfin_write_RTC_ALARM(0);
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bfin_write_RTC_ISTAT(0xFFFF);
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spin_unlock_irq(&rtc->lock);
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}
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static irqreturn_t bfin_rtc_interrupt(int irq, void *dev_id)
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{
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struct device *dev = dev_id;
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struct bfin_rtc *rtc = dev_get_drvdata(dev);
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unsigned long events = 0;
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u16 rtc_istat;
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_istat = bfin_read_RTC_ISTAT();
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if (rtc_istat & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)) {
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bfin_write_RTC_ISTAT(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY);
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events |= RTC_AF | RTC_IRQF;
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}
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if (rtc_istat & RTC_ISTAT_STOPWATCH) {
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bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH);
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events |= RTC_PF | RTC_IRQF;
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bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq);
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}
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if (rtc_istat & RTC_ISTAT_SEC) {
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bfin_write_RTC_ISTAT(RTC_ISTAT_SEC);
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events |= RTC_UF | RTC_IRQF;
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}
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rtc_update_irq(rtc->rtc_dev, 1, events);
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spin_unlock_irq(&rtc->lock);
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return IRQ_HANDLED;
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}
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static int bfin_rtc_open(struct device *dev)
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{
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int ret;
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dev_dbg_stamp(dev);
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ret = request_irq(IRQ_RTC, bfin_rtc_interrupt, IRQF_DISABLED, "rtc-bfin", dev);
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if (unlikely(ret)) {
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dev_err(dev, "request RTC IRQ failed with %d\n", ret);
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return ret;
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}
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rtc_bfin_reset(dev);
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return ret;
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}
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static void bfin_rtc_release(struct device *dev)
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{
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dev_dbg_stamp(dev);
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rtc_bfin_reset(dev);
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free_irq(IRQ_RTC, dev);
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}
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static int bfin_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
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{
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struct bfin_rtc *rtc = dev_get_drvdata(dev);
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dev_dbg_stamp(dev);
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switch (cmd) {
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case RTC_PIE_ON:
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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bfin_write_RTC_ISTAT(RTC_ISTAT_STOPWATCH);
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bfin_write_RTC_SWCNT(rtc->rtc_dev->irq_freq);
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bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | RTC_ISTAT_STOPWATCH);
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spin_unlock_irq(&rtc->lock);
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return 0;
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case RTC_PIE_OFF:
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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bfin_write_RTC_SWCNT(0);
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bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_STOPWATCH);
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spin_unlock_irq(&rtc->lock);
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return 0;
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case RTC_UIE_ON:
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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bfin_write_RTC_ISTAT(RTC_ISTAT_SEC);
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bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | RTC_ISTAT_SEC);
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spin_unlock_irq(&rtc->lock);
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return 0;
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case RTC_UIE_OFF:
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~RTC_ISTAT_SEC);
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spin_unlock_irq(&rtc->lock);
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return 0;
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case RTC_AIE_ON: {
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unsigned long rtc_alarm;
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u16 which_alarm;
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int ret = 0;
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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if (rtc->rtc_alarm.tm_yday == -1) {
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struct rtc_time now;
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rtc_bfin_to_tm(bfin_read_RTC_STAT(), &now);
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now.tm_sec = rtc->rtc_alarm.tm_sec;
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now.tm_min = rtc->rtc_alarm.tm_min;
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now.tm_hour = rtc->rtc_alarm.tm_hour;
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ret = rtc_tm_to_time(&now, &rtc_alarm);
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which_alarm = RTC_ISTAT_ALARM;
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} else {
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ret = rtc_tm_to_time(&rtc->rtc_alarm, &rtc_alarm);
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which_alarm = RTC_ISTAT_ALARM_DAY;
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}
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if (ret == 0) {
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bfin_write_RTC_ISTAT(which_alarm);
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bfin_write_RTC_ALARM(rtc_time_to_bfin(rtc_alarm));
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bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() | which_alarm);
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}
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spin_unlock_irq(&rtc->lock);
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return ret;
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}
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case RTC_AIE_OFF:
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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bfin_write_RTC_ICTL(bfin_read_RTC_ICTL() & ~(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY));
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spin_unlock_irq(&rtc->lock);
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return 0;
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}
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return -ENOIOCTLCMD;
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}
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static int bfin_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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struct bfin_rtc *rtc = dev_get_drvdata(dev);
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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rtc_bfin_sync_pending();
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rtc_bfin_to_tm(bfin_read_RTC_STAT(), tm);
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spin_unlock_irq(&rtc->lock);
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return 0;
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}
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static int bfin_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct bfin_rtc *rtc = dev_get_drvdata(dev);
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int ret;
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unsigned long now;
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dev_dbg_stamp(dev);
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spin_lock_irq(&rtc->lock);
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ret = rtc_tm_to_time(tm, &now);
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if (ret == 0) {
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rtc_bfin_sync_pending();
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bfin_write_RTC_STAT(rtc_time_to_bfin(now));
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}
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spin_unlock_irq(&rtc->lock);
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return ret;
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}
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static int bfin_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct bfin_rtc *rtc = dev_get_drvdata(dev);
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dev_dbg_stamp(dev);
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memcpy(&alrm->time, &rtc->rtc_alarm, sizeof(struct rtc_time));
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alrm->enabled = !!(bfin_read_RTC_ICTL() & (RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY));
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return 0;
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}
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static int bfin_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct bfin_rtc *rtc = dev_get_drvdata(dev);
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dev_dbg_stamp(dev);
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rtc->rtc_alarm = alrm->time;
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return 0;
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}
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static int bfin_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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#define yesno(x) ((x) ? "yes" : "no")
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u16 ictl = bfin_read_RTC_ICTL();
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dev_dbg_stamp(dev);
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seq_printf(seq,
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"alarm_IRQ\t: %s\n"
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"wkalarm_IRQ\t: %s\n"
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"seconds_IRQ\t: %s\n"
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"periodic_IRQ\t: %s\n",
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yesno(ictl & RTC_ISTAT_ALARM),
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yesno(ictl & RTC_ISTAT_ALARM_DAY),
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yesno(ictl & RTC_ISTAT_SEC),
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yesno(ictl & RTC_ISTAT_STOPWATCH));
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return 0;
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#undef yesno
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}
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/**
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* bfin_irq_set_freq - make sure hardware supports requested freq
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* @dev: pointer to RTC device structure
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* @freq: requested frequency rate
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*
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* The Blackfin RTC can only generate periodic events at 1 per
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* second (1 Hz), so reject any attempt at changing it.
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*/
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static int bfin_irq_set_freq(struct device *dev, int freq)
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{
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dev_dbg_stamp(dev);
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return -ENOTTY;
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}
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static struct rtc_class_ops bfin_rtc_ops = {
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.open = bfin_rtc_open,
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.release = bfin_rtc_release,
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.ioctl = bfin_rtc_ioctl,
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.read_time = bfin_rtc_read_time,
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.set_time = bfin_rtc_set_time,
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.read_alarm = bfin_rtc_read_alarm,
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.set_alarm = bfin_rtc_set_alarm,
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.proc = bfin_rtc_proc,
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.irq_set_freq = bfin_irq_set_freq,
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};
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static int __devinit bfin_rtc_probe(struct platform_device *pdev)
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{
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struct bfin_rtc *rtc;
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int ret = 0;
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dev_dbg_stamp(&pdev->dev);
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rtc = kzalloc(sizeof(*rtc), GFP_KERNEL);
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if (unlikely(!rtc))
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return -ENOMEM;
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spin_lock_init(&rtc->lock);
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rtc->rtc_dev = rtc_device_register(pdev->name, &pdev->dev, &bfin_rtc_ops, THIS_MODULE);
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if (unlikely(IS_ERR(rtc))) {
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ret = PTR_ERR(rtc->rtc_dev);
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goto err;
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}
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rtc->rtc_dev->irq_freq = 1;
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platform_set_drvdata(pdev, rtc);
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return 0;
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err:
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kfree(rtc);
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return ret;
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}
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static int __devexit bfin_rtc_remove(struct platform_device *pdev)
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{
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struct bfin_rtc *rtc = platform_get_drvdata(pdev);
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rtc_device_unregister(rtc->rtc_dev);
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platform_set_drvdata(pdev, NULL);
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kfree(rtc);
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return 0;
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}
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static struct platform_driver bfin_rtc_driver = {
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.driver = {
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.name = "rtc-bfin",
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.owner = THIS_MODULE,
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},
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.probe = bfin_rtc_probe,
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.remove = __devexit_p(bfin_rtc_remove),
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};
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static int __init bfin_rtc_init(void)
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{
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return platform_driver_register(&bfin_rtc_driver);
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}
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static void __exit bfin_rtc_exit(void)
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{
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platform_driver_unregister(&bfin_rtc_driver);
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}
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module_init(bfin_rtc_init);
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module_exit(bfin_rtc_exit);
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MODULE_DESCRIPTION("Blackfin On-Chip Real Time Clock Driver");
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MODULE_AUTHOR("Mike Frysinger <vapier@gentoo.org>");
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MODULE_LICENSE("GPL");
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