Simon Ser 26297e1710 drm/fourcc: fix Amlogic format modifier masks ... [ Upstream commit cc3283f8f41f741fbaef63d0503d8fb4a7919100 ] The comment says the layout and options use 8 bits, and the shift uses 8 bits. However the mask is 0xf, ie. 0b00001111 (4 bits). This could be surprising when introducing new layouts or options that take more than 4 bits, as this would silently drop the high bits. Make the masks consistent with the comment and the shift. Found when writing a drm_info patch [1]. [1]: https://github.com/ascent12/drm_info/pull/67 Signed-off-by: Simon Ser <contact@emersion.fr> Fixes: d6528ec883 ("drm/fourcc: Add modifier definitions for describing Amlogic Video Framebuffer Compression") Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210110125103.15447-1-contact@emersion.fr Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-03-04 11:37:38 +01:00
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amdgpu_drm.h	drm/amdgpu: new ids flag for tmz (v2)	2020-08-06 15:45:52 -04:00
armada_drm.h
drm_fourcc.h	drm/fourcc: fix Amlogic format modifier masks	2021-03-04 11:37:38 +01:00
drm_mode.h	drm: report dp downstream port type as a subconnector property	2020-08-11 14:06:04 +02:00
drm_sarea.h
drm.h
etnaviv_drm.h
exynos_drm.h	drm/exynos: Rename Exynos to lowercase	2020-01-21 09:09:42 +09:00
i810_drm.h
i915_drm.h	drm/i915: add syncobj timeline support	2020-08-17 16:16:51 -04:00
lima_drm.h	drm/lima: support heap buffer creation	2020-01-27 22:01:09 +08:00
mga_drm.h
msm_drm.h	drm: msm_drm.h: delete duplicated words in comments	2020-07-15 14:02:58 +02:00
nouveau_drm.h	drm/nouveau: support synchronous pushbuf submission	2020-01-29 15:49:56 +10:00
omap_drm.h
panfrost_drm.h
qxl_drm.h
r128_drm.h
radeon_drm.h
savage_drm.h
sis_drm.h
tegra_drm.h
v3d_drm.h
vc4_drm.h
vgem_drm.h
via_drm.h
virtgpu_drm.h
vmwgfx_drm.h	drm/vmwgfx: Add SM5 param for userspace	2020-03-23 22:48:57 +01:00