forked from luck/tmp_suning_uos_patched
0aec00ae1c
Add top-of-file comment blocks to rtl818x headers and attribute origin of magic values to original r8187 driver. Signed-off-by: John W. Linville <linville@tuxdriver.com>
227 lines
5.5 KiB
C
227 lines
5.5 KiB
C
/*
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* Definitions for RTL818x hardware
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*
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* Copyright 2007 Michael Wu <flamingice@sourmilk.net>
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* Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
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*
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* Based on the r8187 driver, which is:
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* Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef RTL818X_H
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#define RTL818X_H
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struct rtl818x_csr {
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u8 MAC[6];
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u8 reserved_0[2];
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__le32 MAR[2];
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u8 RX_FIFO_COUNT;
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u8 reserved_1;
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u8 TX_FIFO_COUNT;
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u8 BQREQ;
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u8 reserved_2[4];
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__le32 TSFT[2];
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__le32 TLPDA;
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__le32 TNPDA;
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__le32 THPDA;
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__le16 BRSR;
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u8 BSSID[6];
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u8 RESP_RATE;
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u8 EIFS;
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u8 reserved_3[1];
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u8 CMD;
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#define RTL818X_CMD_TX_ENABLE (1 << 2)
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#define RTL818X_CMD_RX_ENABLE (1 << 3)
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#define RTL818X_CMD_RESET (1 << 4)
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u8 reserved_4[4];
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__le16 INT_MASK;
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__le16 INT_STATUS;
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#define RTL818X_INT_RX_OK (1 << 0)
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#define RTL818X_INT_RX_ERR (1 << 1)
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#define RTL818X_INT_TXL_OK (1 << 2)
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#define RTL818X_INT_TXL_ERR (1 << 3)
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#define RTL818X_INT_RX_DU (1 << 4)
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#define RTL818X_INT_RX_FO (1 << 5)
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#define RTL818X_INT_TXN_OK (1 << 6)
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#define RTL818X_INT_TXN_ERR (1 << 7)
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#define RTL818X_INT_TXH_OK (1 << 8)
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#define RTL818X_INT_TXH_ERR (1 << 9)
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#define RTL818X_INT_TXB_OK (1 << 10)
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#define RTL818X_INT_TXB_ERR (1 << 11)
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#define RTL818X_INT_ATIM (1 << 12)
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#define RTL818X_INT_BEACON (1 << 13)
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#define RTL818X_INT_TIME_OUT (1 << 14)
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#define RTL818X_INT_TX_FO (1 << 15)
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__le32 TX_CONF;
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#define RTL818X_TX_CONF_LOOPBACK_MAC (1 << 17)
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#define RTL818X_TX_CONF_NO_ICV (1 << 19)
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#define RTL818X_TX_CONF_DISCW (1 << 20)
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#define RTL818X_TX_CONF_R8180_ABCD (2 << 25)
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#define RTL818X_TX_CONF_R8180_F (3 << 25)
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#define RTL818X_TX_CONF_R8185_ABC (4 << 25)
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#define RTL818X_TX_CONF_R8185_D (5 << 25)
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#define RTL818X_TX_CONF_HWVER_MASK (7 << 25)
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#define RTL818X_TX_CONF_CW_MIN (1 << 31)
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__le32 RX_CONF;
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#define RTL818X_RX_CONF_MONITOR (1 << 0)
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#define RTL818X_RX_CONF_NICMAC (1 << 1)
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#define RTL818X_RX_CONF_MULTICAST (1 << 2)
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#define RTL818X_RX_CONF_BROADCAST (1 << 3)
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#define RTL818X_RX_CONF_DATA (1 << 18)
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#define RTL818X_RX_CONF_CTRL (1 << 19)
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#define RTL818X_RX_CONF_MGMT (1 << 20)
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#define RTL818X_RX_CONF_BSSID (1 << 23)
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#define RTL818X_RX_CONF_RX_AUTORESETPHY (1 << 28)
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#define RTL818X_RX_CONF_ONLYERLPKT (1 << 31)
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__le32 INT_TIMEOUT;
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__le32 TBDA;
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u8 EEPROM_CMD;
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#define RTL818X_EEPROM_CMD_READ (1 << 0)
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#define RTL818X_EEPROM_CMD_WRITE (1 << 1)
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#define RTL818X_EEPROM_CMD_CK (1 << 2)
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#define RTL818X_EEPROM_CMD_CS (1 << 3)
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#define RTL818X_EEPROM_CMD_NORMAL (0 << 6)
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#define RTL818X_EEPROM_CMD_LOAD (1 << 6)
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#define RTL818X_EEPROM_CMD_PROGRAM (2 << 6)
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#define RTL818X_EEPROM_CMD_CONFIG (3 << 6)
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u8 CONFIG0;
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u8 CONFIG1;
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u8 CONFIG2;
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__le32 ANAPARAM;
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u8 MSR;
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#define RTL818X_MSR_NO_LINK (0 << 2)
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#define RTL818X_MSR_ADHOC (1 << 2)
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#define RTL818X_MSR_INFRA (2 << 2)
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u8 CONFIG3;
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#define RTL818X_CONFIG3_ANAPARAM_WRITE (1 << 6)
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u8 CONFIG4;
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#define RTL818X_CONFIG4_POWEROFF (1 << 6)
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#define RTL818X_CONFIG4_VCOOFF (1 << 7)
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u8 TESTR;
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u8 reserved_9[2];
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__le16 PGSELECT;
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__le32 ANAPARAM2;
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u8 reserved_10[12];
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__le16 BEACON_INTERVAL;
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__le16 ATIM_WND;
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__le16 BEACON_INTERVAL_TIME;
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__le16 ATIMTR_INTERVAL;
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u8 reserved_11[4];
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u8 PHY[4];
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__le16 RFPinsOutput;
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__le16 RFPinsEnable;
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__le16 RFPinsSelect;
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__le16 RFPinsInput;
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__le32 RF_PARA;
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__le32 RF_TIMING;
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u8 GP_ENABLE;
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u8 GPIO;
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u8 reserved_12[10];
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u8 TX_AGC_CTL;
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#define RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT (1 << 0)
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#define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT (1 << 1)
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#define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
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u8 TX_GAIN_CCK;
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u8 TX_GAIN_OFDM;
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u8 TX_ANTENNA;
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u8 reserved_13[16];
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u8 WPA_CONF;
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u8 reserved_14[3];
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u8 SIFS;
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u8 DIFS;
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u8 SLOT;
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u8 reserved_15[5];
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u8 CW_CONF;
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#define RTL818X_CW_CONF_PERPACKET_CW_SHIFT (1 << 0)
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#define RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT (1 << 1)
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u8 CW_VAL;
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u8 RATE_FALLBACK;
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u8 reserved_16[25];
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u8 CONFIG5;
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u8 TX_DMA_POLLING;
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u8 reserved_17[2];
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__le16 CWR;
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u8 RETRY_CTR;
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u8 reserved_18[5];
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__le32 RDSAR;
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u8 reserved_19[18];
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u16 TALLY_CNT;
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u8 TALLY_SEL;
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} __attribute__((packed));
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static const struct ieee80211_rate rtl818x_rates[] = {
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{ .rate = 10,
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.val = 0,
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.flags = IEEE80211_RATE_CCK },
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{ .rate = 20,
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.val = 1,
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.flags = IEEE80211_RATE_CCK },
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{ .rate = 55,
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.val = 2,
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.flags = IEEE80211_RATE_CCK },
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{ .rate = 110,
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.val = 3,
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.flags = IEEE80211_RATE_CCK },
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{ .rate = 60,
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.val = 4,
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.flags = IEEE80211_RATE_OFDM },
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{ .rate = 90,
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.val = 5,
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.flags = IEEE80211_RATE_OFDM },
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{ .rate = 120,
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.val = 6,
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.flags = IEEE80211_RATE_OFDM },
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{ .rate = 180,
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.val = 7,
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.flags = IEEE80211_RATE_OFDM },
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{ .rate = 240,
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.val = 8,
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.flags = IEEE80211_RATE_OFDM },
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{ .rate = 360,
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.val = 9,
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.flags = IEEE80211_RATE_OFDM },
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{ .rate = 480,
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.val = 10,
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.flags = IEEE80211_RATE_OFDM },
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{ .rate = 540,
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.val = 11,
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.flags = IEEE80211_RATE_OFDM },
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};
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static const struct ieee80211_channel rtl818x_channels[] = {
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{ .chan = 1,
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.freq = 2412},
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{ .chan = 2,
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.freq = 2417},
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{ .chan = 3,
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.freq = 2422},
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{ .chan = 4,
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.freq = 2427},
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{ .chan = 5,
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.freq = 2432},
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{ .chan = 6,
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.freq = 2437},
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{ .chan = 7,
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.freq = 2442},
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{ .chan = 8,
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.freq = 2447},
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{ .chan = 9,
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.freq = 2452},
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{ .chan = 10,
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.freq = 2457},
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{ .chan = 11,
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.freq = 2462},
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{ .chan = 12,
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.freq = 2467},
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{ .chan = 13,
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.freq = 2472},
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{ .chan = 14,
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.freq = 2484}
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};
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#endif /* RTL818X_H */
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