Max Filippov 19f6dcb1f0 xtensa: fix a7 clobbering in coprocessor context load/store ... commit 839769c35477d4acc2369e45000ca7b0b6af39a7 upstream. Fast coprocessor exception handler saves a3..a6, but coprocessor context load/store code uses a4..a7 as temporaries, potentially clobbering a7. 'Potentially' because coprocessor state load/store macros may not use all four temporary registers (and neither FPU nor HiFi macros do). Use a3..a6 as intended. Cc: stable@vger.kernel.org Fixes: c658eac628 ("[XTENSA] Add support for configurable registers and coprocessors") Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2022-04-27 13:53:55 +02:00
..
boot	xtensa: fix DTC warning unit_address_format	2022-04-13 21:01:00 +02:00
configs	xtensa: reorganize vectors placement	2020-02-04 21:57:02 -08:00
include	xtensa: fix xtensa_wsr always writing 0	2022-04-08 14:39:58 +02:00
kernel	xtensa: fix a7 clobbering in coprocessor context load/store	2022-04-27 13:53:55 +02:00
lib	xtensa: propagate the calling conventions change down into csum_partial_copy_generic()	2020-08-20 15:45:21 -04:00
mm	xtensa: use CONFIG_USE_OF instead of CONFIG_OF	2021-10-13 10:04:26 +02:00
oprofile
platforms	xtensa: xtfpga: Try software restart before simulating CPU reset	2021-10-27 09:56:47 +02:00
variants	xtensa: add test_kc705_be variant	2018-08-20 12:34:45 -07:00
Kconfig	xtensa: fix kconfig unmet dependency warning for HAVE_FUTEX_CMPXCHG	2021-09-08 08:49:00 +02:00
Kconfig.debug	xtensa: make stack dump size configurable	2019-11-26 11:33:39 -08:00
Makefile	xtensa: add XIP kernel support	2019-11-26 11:33:38 -08:00