kernel_optimize_test/drivers/pinctrl/aspeed
Andrew Jeffery 6d329f14a7 pinctrl: aspeed-g4: Add mux configuration for all pins
The patch introducing the g4 pinctrl driver implemented a smattering of
pins to flesh out the implementation of the core and provide bare-bones
support for some OpenPOWER platforms. Now, update the bindings document
to reflect the complete functionality and implement the necessary pin
configuration tables in the driver.

Cc: Timothy Pearson <tpearson@raptorengineering.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-12-27 23:17:23 +01:00
..
Kconfig pinctrl: Add pinctrl-aspeed-g5 driver 2016-09-07 16:53:37 +02:00
Makefile pinctrl: Add pinctrl-aspeed-g5 driver 2016-09-07 16:53:37 +02:00
pinctrl-aspeed-g4.c pinctrl: aspeed-g4: Add mux configuration for all pins 2016-12-27 23:17:23 +01:00
pinctrl-aspeed-g5.c pinctrl: aspeed: Read and write bits in LPC and GFX controllers 2016-12-27 23:15:32 +01:00
pinctrl-aspeed.c pinctrl: aspeed: Read and write bits in LPC and GFX controllers 2016-12-27 23:15:32 +01:00
pinctrl-aspeed.h pinctrl: aspeed: Read and write bits in LPC and GFX controllers 2016-12-27 23:15:32 +01:00