kernel_optimize_test/include/dt-bindings
Linus Torvalds 9420f1ce01 This is the bulk of the pin control changes for the v5.9
kernel series:
 
 Core changes:
 
 - The GPIO patch "gpiolib: Introduce
   for_each_requested_gpio_in_range() macro" was put in an
   immutable branch and merged into the pinctrl tree as well.
   We see these changes also here.
 
 - Improved debug output for pins used as GPIO.
 
 New drivers:
 
 - Ocelot Sparx5 SoC driver.
 
 - Intel Emmitsburg SoC subdriver.
 
 - Intel Tiger Lake-H SoC subdriver.
 
 - Qualcomm PM660 SoC subdriver.
 
 - Renesas SH-PFC R8A774E1 subdriver.
 
 Driver improvements:
 
 - Linear improvement and cleanups of the Intel drivers for
   Cherryview, Lynxpoint, Baytrail etc. Improved locking among
   other things.
 
 - Renesas SH-PFC has added support for RPC pins, groups, and
   functions to r8a77970 and r8a77980.
 
 - The newere Freescale (now NXP) i.MX8 pin controllers have
   been modularized. This is driven by the Google Android
   GKI initiative I think.
 
 - Open drain support for pins on the Qualcomm IPQ4019.
 
 - The Ingenic driver can handle both edges IRQ detection.
 
 - A big slew of documentation fixes all over the place.
 
 - A few irqchip template conversions by yours truly.
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Merge tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the bulk of the pin control changes for the v5.9 kernel
  series:

  Core changes:

   - The GPIO patch "gpiolib: Introduce for_each_requested_gpio_in_range()
     macro" was put in an immutable branch and merged into the pinctrl
     tree as well. We see these changes also here.

   - Improved debug output for pins used as GPIO.

  New drivers:

   - Ocelot Sparx5 SoC driver.

   - Intel Emmitsburg SoC subdriver.

   - Intel Tiger Lake-H SoC subdriver.

   - Qualcomm PM660 SoC subdriver.

   - Renesas SH-PFC R8A774E1 subdriver.

  Driver improvements:

   - Linear improvement and cleanups of the Intel drivers for
     Cherryview, Lynxpoint, Baytrail etc. Improved locking among other
     things.

   - Renesas SH-PFC has added support for RPC pins, groups, and
     functions to r8a77970 and r8a77980.

   - The newere Freescale (now NXP) i.MX8 pin controllers have been
     modularized. This is driven by the Google Android GKI initiative I
     think.

   - Open drain support for pins on the Qualcomm IPQ4019.

   - The Ingenic driver can handle both edges IRQ detection.

   - A big slew of documentation fixes all over the place.

   - A few irqchip template conversions by yours truly.

* tag 'pinctrl-v5.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (107 commits)
  dt-bindings: pinctrl: add bindings for MediaTek MT6779 SoC
  pinctrl: stmfx: Use irqchip template
  pinctrl: amd: Use irqchip template
  pinctrl: mediatek: fix build for tristate changes
  pinctrl: samsung: Use bank name as irqchip name
  pinctrl: core: print gpio in pins debugfs file
  pinctrl: mediatek: add mt6779 eint support
  pinctrl: mediatek: add pinctrl support for MT6779 SoC
  pinctrl: mediatek: avoid virtual gpio trying to set reg
  pinctrl: mediatek: update pinmux definitions for mt6779
  pinctrl: stm32: use the hwspin_lock_timeout_in_atomic() API
  pinctrl: mcp23s08: Use irqchip template
  pinctrl: sx150x: Use irqchip template
  dt-bindings: ingenic,pinctrl: Support pinmux/pinconf nodes
  pinctrl: intel: Add Intel Emmitsburg pin controller support
  pinctl: ti: iodelay: Replace HTTP links with HTTPS ones
  Revert "gpio: omap: handle pin config bias flags"
  pinctrl: single: Use fallthrough pseudo-keyword
  pinctrl: qcom: spmi-gpio: Use fallthrough pseudo-keyword
  pinctrl: baytrail: Use fallthrough pseudo-keyword
  ...
2020-08-09 12:52:28 -07:00
..
arm
bus
clk dt: Add additional option bindings for IDT VersaClock 2020-06-22 19:04:58 -07:00
clock It looks like a smaller batch of clk updates this time around. In the core 2020-08-07 13:35:51 -07:00
display
dma dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA 2020-07-17 11:37:59 +05:30
firmware/imx
gce dt-binding: gce: add gce header file for mt6779 2020-08-03 23:56:37 -05:00
gpio
i2c
iio Merge branch 'ib-5.8-jz47xx-ts' into HEAD 2020-07-22 14:36:31 +01:00
input
interconnect
interrupt-controller
leds leds: add RGB color option, as that is different from multicolor. 2020-08-03 13:26:15 +02:00
mailbox dt-bindings: mailbox: Add devicetree binding for Qcom IPCC 2020-05-30 18:10:27 -05:00
media
memory
mfd
mips
mux Devicetree updates for v5.9: 2020-08-05 13:02:45 -07:00
net
phy dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY 2020-06-29 18:48:00 +05:30
pinctrl This is the bulk of the pin control changes for the v5.9 2020-08-09 12:52:28 -07:00
pmu
power Qualcomm ARM64 DT additional updates for 5.9 2020-07-31 10:41:56 +02:00
pwm
regulator Merge series "regulator: mt6397: Implement of_map_mode regulator_desc function" from Anand K Mistry <amistry@google.com>: 2020-07-02 16:45:49 +01:00
reset reset: Replace HTTP links with HTTPS ones 2020-07-20 11:27:12 +02:00
reset-controller
soc
sound ASoC: dt-bindings: q6asm: Add Q6ASM_DAI_{TX_RX, TX, RX} defines 2020-07-27 14:21:09 +01:00
spmi
thermal
usb