Steven J. Hill 71a1c776d5 MIPS: Fixup ordering of micro assembler instructions. ... A number of new instructions have been added to the micro assembler causing the list to no longer be in alphabetical order. This patch fixes up the name ordering. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3789/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2012-07-23 13:55:56 +01:00
..
c-octeon.c
c-r3k.c
c-r4k.c	MIPS: Fix decoding of c0_config1 for MIPSxx caches with 32 ways per set.	2012-07-19 11:23:43 +02:00
c-tx39.c
cache.c
cerr-sb1.c
cex-gen.S
cex-oct.S
cex-sb1.S
dma-default.c
extable.c
fault.c
gup.c
highmem.c
hugetlbpage.c
init.c
ioremap.c
Makefile
mmap.c
page-funcs.S
page.c
pgtable-32.c
pgtable-64.c
sc-ip22.c
sc-mips.c
sc-r5k.c
sc-rm7k.c
tlb-r3k.c
tlb-r4k.c
tlb-r8k.c
tlbex-fault.S
tlbex.c
uasm.c	MIPS: Fixup ordering of micro assembler instructions.	2012-07-23 13:55:56 +01:00