forked from luck/tmp_suning_uos_patched
b22c3d8275
There is a design issue related to PCIe AER and _OSC that the BIOS may be asked to grant control of the AER service even if some Hardware Error Source Table (HEST) entries contain information meaning that the BIOS really should control it. Namely, pcie_port_acpi_setup() calls pcie_aer_get_firmware_first() that determines whether or not the AER service should be controlled by the BIOS on the basis of the HEST information for the given PCIe port. The BIOS is asked to grant control of the AER service for a PCIe Root Complex if pcie_aer_get_firmware_first() returns 'false' for at least one root port in that complex, even if all of the other root ports' HEST entries have the FIRMWARE_FIRST flag set (and none of them has the GLOBAL flag set). However, if the AER service is controlled by the kernel, that may interfere with the BIOS' handling of the error sources having the FIRMWARE_FIRST flag. Moreover, there may be PCIe endpoints that have the FIRMWARE_FIRST flag set in HEST and are attached to the root ports in question, in which case it also may be unsafe to ask the BIOS for control of the AER service. For this reason, introduce a function checking if there's at least one PCIe-related HEST entry with the FIRMWARE_FIRST flag set and disable the native AER service altogether if this function returns 'true'. Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
131 lines
2.9 KiB
C
131 lines
2.9 KiB
C
/*
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* Access ACPI _OSC method
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*
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* Copyright (C) 2006 Intel Corp.
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* Tom Long Nguyen (tom.l.nguyen@intel.com)
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* Zhang Yanmin (yanmin.zhang@intel.com)
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*
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/pm.h>
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#include <linux/suspend.h>
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#include <linux/acpi.h>
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#include <linux/pci-acpi.h>
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#include <linux/delay.h>
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#include <acpi/apei.h>
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#include "aerdrv.h"
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#ifdef CONFIG_ACPI_APEI
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static inline int hest_match_pci(struct acpi_hest_aer_common *p,
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struct pci_dev *pci)
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{
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return (0 == pci_domain_nr(pci->bus) &&
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p->bus == pci->bus->number &&
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p->device == PCI_SLOT(pci->devfn) &&
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p->function == PCI_FUNC(pci->devfn));
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}
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struct aer_hest_parse_info {
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struct pci_dev *pci_dev;
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int firmware_first;
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};
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static int aer_hest_parse(struct acpi_hest_header *hest_hdr, void *data)
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{
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struct aer_hest_parse_info *info = data;
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struct acpi_hest_aer_common *p;
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u8 pcie_type = 0;
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u8 bridge = 0;
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int ff = 0;
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switch (hest_hdr->type) {
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case ACPI_HEST_TYPE_AER_ROOT_PORT:
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pcie_type = PCI_EXP_TYPE_ROOT_PORT;
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break;
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case ACPI_HEST_TYPE_AER_ENDPOINT:
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pcie_type = PCI_EXP_TYPE_ENDPOINT;
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break;
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case ACPI_HEST_TYPE_AER_BRIDGE:
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if ((info->pci_dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
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bridge = 1;
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break;
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default:
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return 0;
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}
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p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
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if (p->flags & ACPI_HEST_GLOBAL) {
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if ((info->pci_dev->is_pcie &&
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info->pci_dev->pcie_type == pcie_type) || bridge)
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ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
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} else
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if (hest_match_pci(p, info->pci_dev))
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ff = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
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info->firmware_first = ff;
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return 0;
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}
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static void aer_set_firmware_first(struct pci_dev *pci_dev)
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{
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int rc;
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struct aer_hest_parse_info info = {
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.pci_dev = pci_dev,
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.firmware_first = 0,
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};
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rc = apei_hest_parse(aer_hest_parse, &info);
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if (rc)
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pci_dev->__aer_firmware_first = 0;
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else
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pci_dev->__aer_firmware_first = info.firmware_first;
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pci_dev->__aer_firmware_first_valid = 1;
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}
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int pcie_aer_get_firmware_first(struct pci_dev *dev)
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{
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if (!dev->__aer_firmware_first_valid)
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aer_set_firmware_first(dev);
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return dev->__aer_firmware_first;
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}
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static bool aer_firmware_first;
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static int aer_hest_parse_aff(struct acpi_hest_header *hest_hdr, void *data)
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{
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struct acpi_hest_aer_common *p;
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if (aer_firmware_first)
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return 0;
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switch (hest_hdr->type) {
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case ACPI_HEST_TYPE_AER_ROOT_PORT:
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case ACPI_HEST_TYPE_AER_ENDPOINT:
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case ACPI_HEST_TYPE_AER_BRIDGE:
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p = (struct acpi_hest_aer_common *)(hest_hdr + 1);
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aer_firmware_first = !!(p->flags & ACPI_HEST_FIRMWARE_FIRST);
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default:
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return 0;
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}
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}
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/**
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* aer_acpi_firmware_first - Check if APEI should control AER.
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*/
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bool aer_acpi_firmware_first(void)
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{
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static bool parsed = false;
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if (!parsed) {
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apei_hest_parse(aer_hest_parse_aff, NULL);
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parsed = true;
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}
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return aer_firmware_first;
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}
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#endif
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