AcoSail/kernel_optimize_test
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kernel_optimize_test/arch/arm/mach-vexpress
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Will Deacon 2de59fea8b ARM: 6411/1: vexpress: set RAM latencies to 1 cycle for PL310 on ct-ca9x4 tile 
The PL310 on the ct-ca9x4 tile for the Versatile Express does not need
to add additional latency when accessing its cache RAMs. Unfortunately,
the boot monitor sets this up for an 8-cycle delay on reads and writes,
resulting in greatly reduced memory performance when the L2 cache is
enabled.

This patch sets the L2 RAM latencies to the correct value of 1 cycle
on the ct-ca9x4 tile before enabling the L2 cache.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-09-27 14:57:36 +01:00
..
include/mach ARM: 6218/1: Versatile Express: add support for local timers on CA9X4 daughterboard 2010-07-09 14:21:51 +01:00
core.h
ct-ca9x4.c ARM: 6411/1: vexpress: set RAM latencies to 1 cycle for PL310 on ct-ca9x4 tile 2010-09-27 14:57:36 +01:00
headsmp.S ARM: Add Versatile Express SMP support 2010-05-02 09:35:39 +01:00
Kconfig ARM: Add Versatile Express CA9x4 processor support 2010-05-02 09:35:39 +01:00
localtimer.c ARM: Add Versatile Express SMP support 2010-05-02 09:35:39 +01:00
Makefile ARM: Add Versatile Express SMP support 2010-05-02 09:35:39 +01:00
Makefile.boot
platsmp.c ARM: Add Versatile Express SMP support 2010-05-02 09:35:39 +01:00
v2m.c Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm 2010-08-03 14:31:24 -07:00