forked from luck/tmp_suning_uos_patched
2f17dd34ff
The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
282 lines
6.9 KiB
C
282 lines
6.9 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* TQ-Systems PLD MFD core driver, based on vendor driver by
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* Vadim V.Vlasov <vvlasov@dev.rtsoft.ru>
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*
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* Copyright (c) 2015 TQ-Systems GmbH
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* Copyright (c) 2019 Andrew Lunn <andrew@lunn.ch>
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*/
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#include <linux/delay.h>
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#include <linux/dmi.h>
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#include <linux/i2c.h>
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#include <linux/io.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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#include <linux/platform_data/i2c-ocores.h>
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#include <linux/platform_device.h>
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#define TQMX86_IOBASE 0x160
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#define TQMX86_IOSIZE 0x3f
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#define TQMX86_IOBASE_I2C 0x1a0
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#define TQMX86_IOSIZE_I2C 0xa
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#define TQMX86_IOBASE_WATCHDOG 0x18b
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#define TQMX86_IOSIZE_WATCHDOG 0x2
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#define TQMX86_IOBASE_GPIO 0x18d
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#define TQMX86_IOSIZE_GPIO 0x4
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#define TQMX86_REG_BOARD_ID 0x20
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#define TQMX86_REG_BOARD_ID_E38M 1
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#define TQMX86_REG_BOARD_ID_50UC 2
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#define TQMX86_REG_BOARD_ID_E38C 3
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#define TQMX86_REG_BOARD_ID_60EB 4
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#define TQMX86_REG_BOARD_ID_E39M 5
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#define TQMX86_REG_BOARD_ID_E39C 6
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#define TQMX86_REG_BOARD_ID_E39x 7
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#define TQMX86_REG_BOARD_ID_70EB 8
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#define TQMX86_REG_BOARD_ID_80UC 9
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#define TQMX86_REG_BOARD_ID_90UC 10
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#define TQMX86_REG_BOARD_REV 0x21
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#define TQMX86_REG_IO_EXT_INT 0x26
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#define TQMX86_REG_IO_EXT_INT_NONE 0
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#define TQMX86_REG_IO_EXT_INT_7 1
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#define TQMX86_REG_IO_EXT_INT_9 2
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#define TQMX86_REG_IO_EXT_INT_12 3
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#define TQMX86_REG_IO_EXT_INT_MASK 0x3
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#define TQMX86_REG_IO_EXT_INT_GPIO_SHIFT 4
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#define TQMX86_REG_I2C_DETECT 0x47
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#define TQMX86_REG_I2C_DETECT_SOFT 0xa5
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#define TQMX86_REG_I2C_INT_EN 0x49
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static uint gpio_irq;
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module_param(gpio_irq, uint, 0);
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MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (7, 9, 12)");
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static const struct resource tqmx_i2c_soft_resources[] = {
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DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C),
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};
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static const struct resource tqmx_watchdog_resources[] = {
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DEFINE_RES_IO(TQMX86_IOBASE_WATCHDOG, TQMX86_IOSIZE_WATCHDOG),
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};
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/*
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* The IRQ resource must be first, since it is updated with the
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* configured IRQ in the probe function.
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*/
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static struct resource tqmx_gpio_resources[] = {
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DEFINE_RES_IRQ(0),
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DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO),
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};
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static struct i2c_board_info tqmx86_i2c_devices[] = {
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{
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/* 4K EEPROM at 0x50 */
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I2C_BOARD_INFO("24c32", 0x50),
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},
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};
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static struct ocores_i2c_platform_data ocores_platfom_data = {
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.num_devices = ARRAY_SIZE(tqmx86_i2c_devices),
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.devices = tqmx86_i2c_devices,
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};
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static const struct mfd_cell tqmx86_i2c_soft_dev[] = {
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{
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.name = "ocores-i2c",
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.platform_data = &ocores_platfom_data,
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.pdata_size = sizeof(ocores_platfom_data),
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.resources = tqmx_i2c_soft_resources,
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.num_resources = ARRAY_SIZE(tqmx_i2c_soft_resources),
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},
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};
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static const struct mfd_cell tqmx86_devs[] = {
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{
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.name = "tqmx86-wdt",
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.resources = tqmx_watchdog_resources,
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.num_resources = ARRAY_SIZE(tqmx_watchdog_resources),
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.ignore_resource_conflicts = true,
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},
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{
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.name = "tqmx86-gpio",
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.resources = tqmx_gpio_resources,
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.num_resources = ARRAY_SIZE(tqmx_gpio_resources),
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.ignore_resource_conflicts = true,
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},
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};
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static const char *tqmx86_board_id_to_name(u8 board_id)
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{
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switch (board_id) {
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case TQMX86_REG_BOARD_ID_E38M:
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return "TQMxE38M";
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case TQMX86_REG_BOARD_ID_50UC:
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return "TQMx50UC";
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case TQMX86_REG_BOARD_ID_E38C:
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return "TQMxE38C";
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case TQMX86_REG_BOARD_ID_60EB:
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return "TQMx60EB";
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case TQMX86_REG_BOARD_ID_E39M:
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return "TQMxE39M";
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case TQMX86_REG_BOARD_ID_E39C:
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return "TQMxE39C";
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case TQMX86_REG_BOARD_ID_E39x:
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return "TQMxE39x";
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case TQMX86_REG_BOARD_ID_70EB:
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return "TQMx70EB";
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case TQMX86_REG_BOARD_ID_80UC:
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return "TQMx80UC";
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case TQMX86_REG_BOARD_ID_90UC:
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return "TQMx90UC";
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default:
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return "Unknown";
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}
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}
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static int tqmx86_board_id_to_clk_rate(u8 board_id)
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{
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switch (board_id) {
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case TQMX86_REG_BOARD_ID_50UC:
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case TQMX86_REG_BOARD_ID_60EB:
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case TQMX86_REG_BOARD_ID_70EB:
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case TQMX86_REG_BOARD_ID_80UC:
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case TQMX86_REG_BOARD_ID_90UC:
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return 24000;
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case TQMX86_REG_BOARD_ID_E39M:
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case TQMX86_REG_BOARD_ID_E39C:
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case TQMX86_REG_BOARD_ID_E39x:
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return 25000;
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case TQMX86_REG_BOARD_ID_E38M:
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case TQMX86_REG_BOARD_ID_E38C:
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return 33000;
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default:
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return 0;
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}
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}
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static int tqmx86_probe(struct platform_device *pdev)
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{
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u8 board_id, rev, i2c_det, i2c_ien, io_ext_int_val;
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struct device *dev = &pdev->dev;
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u8 gpio_irq_cfg, readback;
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const char *board_name;
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void __iomem *io_base;
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int err;
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switch (gpio_irq) {
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case 0:
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gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_NONE;
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break;
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case 7:
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gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_7;
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break;
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case 9:
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gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_9;
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break;
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case 12:
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gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_12;
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break;
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default:
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pr_err("tqmx86: Invalid GPIO IRQ (%d)\n", gpio_irq);
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return -EINVAL;
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}
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io_base = devm_ioport_map(dev, TQMX86_IOBASE, TQMX86_IOSIZE);
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if (!io_base)
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return -ENOMEM;
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board_id = ioread8(io_base + TQMX86_REG_BOARD_ID);
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board_name = tqmx86_board_id_to_name(board_id);
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rev = ioread8(io_base + TQMX86_REG_BOARD_REV);
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dev_info(dev,
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"Found %s - Board ID %d, PCB Revision %d, PLD Revision %d\n",
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board_name, board_id, rev >> 4, rev & 0xf);
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i2c_det = ioread8(io_base + TQMX86_REG_I2C_DETECT);
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i2c_ien = ioread8(io_base + TQMX86_REG_I2C_INT_EN);
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if (gpio_irq_cfg) {
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io_ext_int_val =
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gpio_irq_cfg << TQMX86_REG_IO_EXT_INT_GPIO_SHIFT;
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iowrite8(io_ext_int_val, io_base + TQMX86_REG_IO_EXT_INT);
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readback = ioread8(io_base + TQMX86_REG_IO_EXT_INT);
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if (readback != io_ext_int_val) {
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dev_warn(dev, "GPIO interrupts not supported.\n");
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return -EINVAL;
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}
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/* Assumes the IRQ resource is first. */
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tqmx_gpio_resources[0].start = gpio_irq;
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}
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ocores_platfom_data.clock_khz = tqmx86_board_id_to_clk_rate(board_id);
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if (i2c_det == TQMX86_REG_I2C_DETECT_SOFT) {
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err = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
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tqmx86_i2c_soft_dev,
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ARRAY_SIZE(tqmx86_i2c_soft_dev),
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NULL, 0, NULL);
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if (err)
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return err;
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}
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return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
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tqmx86_devs,
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ARRAY_SIZE(tqmx86_devs),
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NULL, 0, NULL);
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}
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static int tqmx86_create_platform_device(const struct dmi_system_id *id)
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{
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struct platform_device *pdev;
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int err;
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pdev = platform_device_alloc("tqmx86", -1);
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if (!pdev)
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return -ENOMEM;
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err = platform_device_add(pdev);
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if (err)
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platform_device_put(pdev);
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return err;
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}
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static const struct dmi_system_id tqmx86_dmi_table[] __initconst = {
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{
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.ident = "TQMX86",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "TQ-Group"),
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DMI_MATCH(DMI_PRODUCT_NAME, "TQMx"),
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},
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.callback = tqmx86_create_platform_device,
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},
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{}
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};
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MODULE_DEVICE_TABLE(dmi, tqmx86_dmi_table);
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static struct platform_driver tqmx86_driver = {
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.driver = {
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.name = "tqmx86",
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},
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.probe = tqmx86_probe,
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};
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static int __init tqmx86_init(void)
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{
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if (!dmi_check_system(tqmx86_dmi_table))
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return -ENODEV;
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return platform_driver_register(&tqmx86_driver);
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}
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module_init(tqmx86_init);
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MODULE_DESCRIPTION("TQx86 PLD Core Driver");
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MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:tqmx86");
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