forked from luck/tmp_suning_uos_patched
76fd231717
The purpose of the code being modified is to determine the location of the calgary chip address space. This is done by a magical formula of FE0MB-8MB*OneBasedChassisNumber+1MB*(RioNodeId-ChassisBase) to find the offset where BIOS puts it. In this formula, OneBasedChassisNumber corresponds to the NUMA node, and rionodeid is always 2 or 3 depending on which chip in the system it is. The problem was that we had an off by one error that caused us to account some busses to the wrong chip and thus give them the wrong address space. Fixes RH bugzilla #203971. Signed-off-by: Jon Mason <jdmason@kudzu.us> Signed-off-bu: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: Andi Kleen <ak@suse.de> |
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alpha | ||
arm | ||
arm26 | ||
avr32 | ||
cris | ||
frv | ||
h8300 | ||
i386 | ||
ia64 | ||
m32r | ||
m68k | ||
m68knommu | ||
mips | ||
parisc | ||
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ppc | ||
s390 | ||
sh | ||
sh64 | ||
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um | ||
v850 | ||
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xtensa |