forked from luck/tmp_suning_uos_patched
77b0bf55bc
Using macros in inline assembly allows us to work around bugs in GCC's inlining decisions. Compile macros.S and use it to assemble all C files. Currently only x86 will use it. Background: The inlining pass of GCC doesn't include an assembler, so it's not aware of basic properties of the generated code, such as its size in bytes, or that there are such things as discontiuous blocks of code and data due to the newfangled linker feature called 'sections' ... Instead GCC uses a lazy and fragile heuristic: it does a linear count of certain syntactic and whitespace elements in inlined assembly block source code, such as a count of new-lines and semicolons (!), as a poor substitute for "code size and complexity". Unsurprisingly this heuristic falls over and breaks its neck whith certain common types of kernel code that use inline assembly, such as the frequent practice of putting useful information into alternative sections. As a result of this fresh, 20+ years old GCC bug, GCC's inlining decisions are effectively disabled for inlined functions that make use of such asm() blocks, because GCC thinks those sections of code are "large" - when in reality they are often result in just a very low number of machine instructions. This absolute lack of inlining provess when GCC comes across such asm() blocks both increases generated kernel code size and causes performance overhead, which is particularly noticeable on paravirt kernels, which make frequent use of these inlining facilities in attempt to stay out of the way when running on baremetal hardware. Instead of fixing the compiler we use a workaround: we set an assembly macro and call it from the inlined assembly block. As a result GCC considers the inline assembly block as a single instruction. (Which it often isn't but I digress.) This uglifies and bloats the source code - for example just the refcount related changes have this impact: Makefile | 9 +++++++-- arch/x86/Makefile | 7 +++++++ arch/x86/kernel/macros.S | 7 +++++++ scripts/Kbuild.include | 4 +++- scripts/mod/Makefile | 2 ++ 5 files changed, 26 insertions(+), 3 deletions(-) Yay readability and maintainability, it's not like assembly code is hard to read and maintain ... We also hope that GCC will eventually get fixed, but we are not holding our breath for that. Yet we are optimistic, it might still happen, any decade now. [ mingo: Wrote new changelog describing the background. ] Tested-by: Kees Cook <keescook@chromium.org> Signed-off-by: Nadav Amit <namit@vmware.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Brian Gerst <brgerst@gmail.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Michal Marek <michal.lkml@markovi.net> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kbuild@vger.kernel.org Link: http://lkml.kernel.org/r/20181003213100.189959-3-namit@vmware.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
404 lines
15 KiB
Plaintext
404 lines
15 KiB
Plaintext
####
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# kbuild: Generic definitions
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# Convenient variables
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comma := ,
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quote := "
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squote := '
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empty :=
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space := $(empty) $(empty)
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space_escape := _-_SPACE_-_
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pound := \#
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###
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# Name of target with a '.' as filename prefix. foo/bar.o => foo/.bar.o
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dot-target = $(dir $@).$(notdir $@)
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###
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# The temporary file to save gcc -MD generated dependencies must not
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# contain a comma
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depfile = $(subst $(comma),_,$(dot-target).d)
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###
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# filename of target with directory and extension stripped
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basetarget = $(basename $(notdir $@))
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###
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# filename of first prerequisite with directory and extension stripped
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baseprereq = $(basename $(notdir $<))
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###
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# Escape single quote for use in echo statements
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escsq = $(subst $(squote),'\$(squote)',$1)
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###
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# Easy method for doing a status message
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kecho := :
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quiet_kecho := echo
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silent_kecho := :
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kecho := $($(quiet)kecho)
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###
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# filechk is used to check if the content of a generated file is updated.
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# Sample usage:
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# define filechk_sample
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# echo $KERNELRELEASE
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# endef
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# version.h : Makefile
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# $(call filechk,sample)
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# The rule defined shall write to stdout the content of the new file.
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# The existing file will be compared with the new one.
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# - If no file exist it is created
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# - If the content differ the new file is used
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# - If they are equal no change, and no timestamp update
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# - stdin is piped in from the first prerequisite ($<) so one has
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# to specify a valid file as first prerequisite (often the kbuild file)
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define filechk
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$(Q)set -e; \
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mkdir -p $(dir $@); \
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$(filechk_$(1)) > $@.tmp; \
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if [ -r $@ ] && cmp -s $@ $@.tmp; then \
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rm -f $@.tmp; \
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else \
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$(kecho) ' UPD $@'; \
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mv -f $@.tmp $@; \
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fi
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endef
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######
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# gcc support functions
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# See documentation in Documentation/kbuild/makefiles.txt
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# cc-cross-prefix
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# Usage: CROSS_COMPILE := $(call cc-cross-prefix, m68k-linux-gnu- m68k-linux-)
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# Return first prefix where a prefix$(CC) is found in PATH.
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# If no $(CC) found in PATH with listed prefixes return nothing
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cc-cross-prefix = \
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$(word 1, $(foreach c,$(1), \
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$(shell set -e; \
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if (which $(strip $(c))$(CC)) > /dev/null 2>&1 ; then \
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echo $(c); \
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fi)))
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# output directory for tests below
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TMPOUT := $(if $(KBUILD_EXTMOD),$(firstword $(KBUILD_EXTMOD))/)
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# try-run
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# Usage: option = $(call try-run, $(CC)...-o "$$TMP",option-ok,otherwise)
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# Exit code chooses option. "$$TMP" serves as a temporary file and is
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# automatically cleaned up.
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try-run = $(shell set -e; \
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TMP="$(TMPOUT).$$$$.tmp"; \
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TMPO="$(TMPOUT).$$$$.o"; \
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if ($(1)) >/dev/null 2>&1; \
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then echo "$(2)"; \
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else echo "$(3)"; \
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fi; \
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rm -f "$$TMP" "$$TMPO")
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# as-option
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# Usage: cflags-y += $(call as-option,-Wa$(comma)-isa=foo,)
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as-option = $(call try-run,\
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$(CC) $(KBUILD_CFLAGS) $(1) -c -x assembler /dev/null -o "$$TMP",$(1),$(2))
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# as-instr
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# Usage: cflags-y += $(call as-instr,instr,option1,option2)
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as-instr = $(call try-run,\
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printf "%b\n" "$(1)" | $(CC) $(KBUILD_AFLAGS) -c -x assembler -o "$$TMP" -,$(2),$(3))
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# __cc-option
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# Usage: MY_CFLAGS += $(call __cc-option,$(CC),$(MY_CFLAGS),-march=winchip-c6,-march=i586)
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__cc-option = $(call try-run,\
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$(1) -Werror $(2) $(3) -c -x c /dev/null -o "$$TMP",$(3),$(4))
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# Do not attempt to build with gcc plugins during cc-option tests.
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# (And this uses delayed resolution so the flags will be up to date.)
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# In addition, do not include the asm macros which are built later.
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CC_OPTION_FILTERED = $(GCC_PLUGINS_CFLAGS) $(ASM_MACRO_FLAGS)
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CC_OPTION_CFLAGS = $(filter-out $(CC_OPTION_FILTERED),$(KBUILD_CFLAGS))
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# cc-option
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# Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586)
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cc-option = $(call __cc-option, $(CC),\
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$(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS),$(1),$(2))
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# hostcc-option
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# Usage: cflags-y += $(call hostcc-option,-march=winchip-c6,-march=i586)
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hostcc-option = $(call __cc-option, $(HOSTCC),\
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$(KBUILD_HOSTCFLAGS) $(HOST_EXTRACFLAGS),$(1),$(2))
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# cc-option-yn
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# Usage: flag := $(call cc-option-yn,-march=winchip-c6)
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cc-option-yn = $(call try-run,\
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$(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n)
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# cc-disable-warning
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# Usage: cflags-y += $(call cc-disable-warning,unused-but-set-variable)
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cc-disable-warning = $(call try-run,\
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$(CC) -Werror $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -W$(strip $(1)) -c -x c /dev/null -o "$$TMP",-Wno-$(strip $(1)))
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# cc-name
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# Expands to either gcc or clang
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cc-name = $(shell $(CC) -v 2>&1 | grep -q "clang version" && echo clang || echo gcc)
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# cc-version
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cc-version = $(shell $(CONFIG_SHELL) $(srctree)/scripts/gcc-version.sh $(CC))
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# cc-fullversion
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cc-fullversion = $(shell $(CONFIG_SHELL) \
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$(srctree)/scripts/gcc-version.sh -p $(CC))
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# cc-ifversion
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# Usage: EXTRA_CFLAGS += $(call cc-ifversion, -lt, 0402, -O1)
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cc-ifversion = $(shell [ $(cc-version) $(1) $(2) ] && echo $(3) || echo $(4))
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# cc-ldoption
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# Usage: ldflags += $(call cc-ldoption, -Wl$(comma)--hash-style=both)
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cc-ldoption = $(call try-run,\
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$(CC) $(1) $(KBUILD_CPPFLAGS) $(CC_OPTION_CFLAGS) -nostdlib -x c /dev/null -o "$$TMP",$(1),$(2))
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# ld-option
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# Usage: KBUILD_LDFLAGS += $(call ld-option, -X, -Y)
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ld-option = $(call try-run, $(LD) $(KBUILD_LDFLAGS) $(1) -v,$(1),$(2),$(3))
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# ar-option
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# Usage: KBUILD_ARFLAGS := $(call ar-option,D)
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# Important: no spaces around options
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ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2))
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# ld-version
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# Note this is mainly for HJ Lu's 3 number binutil versions
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ld-version = $(shell $(LD) --version | $(srctree)/scripts/ld-version.sh)
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# ld-ifversion
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# Usage: $(call ld-ifversion, -ge, 22252, y)
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ld-ifversion = $(shell [ $(ld-version) $(1) $(2) ] && echo $(3) || echo $(4))
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######
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
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# Usage:
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# $(Q)$(MAKE) $(build)=dir
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build := -f $(srctree)/scripts/Makefile.build obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj=
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# Usage:
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# $(Q)$(MAKE) $(modbuiltin)=dir
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modbuiltin := -f $(srctree)/scripts/Makefile.modbuiltin obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.dtbinst obj=
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# Usage:
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# $(Q)$(MAKE) $(dtbinst)=dir
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dtbinst := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.dtbinst obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.clean obj=
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# Usage:
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# $(Q)$(MAKE) $(clean)=dir
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clean := -f $(srctree)/scripts/Makefile.clean obj
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###
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# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.headersinst obj=
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# Usage:
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# $(Q)$(MAKE) $(hdr-inst)=dir
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hdr-inst := -f $(srctree)/scripts/Makefile.headersinst obj
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# Prefix -I with $(srctree) if it is not an absolute path.
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# skip if -I has no parameter
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addtree = $(if $(patsubst -I%,%,$(1)), \
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$(if $(filter-out -I/% -I./% -I../%,$(1)),$(patsubst -I%,-I$(srctree)/%,$(1)),$(1)),$(1))
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# Find all -I options and call addtree
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flags = $(foreach o,$($(1)),$(if $(filter -I%,$(o)),$(call addtree,$(o)),$(o)))
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# echo command.
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# Short version is used, if $(quiet) equals `quiet_', otherwise full one.
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echo-cmd = $(if $($(quiet)cmd_$(1)),\
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echo ' $(call escsq,$($(quiet)cmd_$(1)))$(echo-why)';)
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# printing commands
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cmd = @$(echo-cmd) $(cmd_$(1))
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# Add $(obj)/ for paths that are not absolute
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objectify = $(foreach o,$(1),$(if $(filter /%,$(o)),$(o),$(obj)/$(o)))
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###
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# if_changed - execute command if any prerequisite is newer than
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# target, or command line has changed
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# if_changed_dep - as if_changed, but uses fixdep to reveal dependencies
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# including used config symbols
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# if_changed_rule - as if_changed but execute rule instead
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# See Documentation/kbuild/makefiles.txt for more info
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ifneq ($(KBUILD_NOCMDDEP),1)
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# Check if both arguments are the same including their order. Result is empty
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# string if equal. User may override this check using make KBUILD_NOCMDDEP=1
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arg-check = $(filter-out $(subst $(space),$(space_escape),$(strip $(cmd_$@))), \
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$(subst $(space),$(space_escape),$(strip $(cmd_$1))))
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else
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arg-check = $(if $(strip $(cmd_$@)),,1)
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endif
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# Replace >$< with >$$< to preserve $ when reloading the .cmd file
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# (needed for make)
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# Replace >#< with >$(pound)< to avoid starting a comment in the .cmd file
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# (needed for make)
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# Replace >'< with >'\''< to be able to enclose the whole string in '...'
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# (needed for the shell)
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make-cmd = $(call escsq,$(subst $(pound),$$(pound),$(subst $$,$$$$,$(cmd_$(1)))))
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# Find any prerequisites that is newer than target or that does not exist.
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# PHONY targets skipped in both cases.
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any-prereq = $(filter-out $(PHONY),$?) $(filter-out $(PHONY) $(wildcard $^),$^)
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# Execute command if command has changed or prerequisite(s) are updated.
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if_changed = $(if $(strip $(any-prereq) $(arg-check)), \
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@set -e; \
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$(echo-cmd) $(cmd_$(1)); \
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printf '%s\n' 'cmd_$@ := $(make-cmd)' > $(dot-target).cmd, @:)
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# Execute the command and also postprocess generated .d dependencies file.
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if_changed_dep = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(cmd_and_fixdep), @:)
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ifndef CONFIG_TRIM_UNUSED_KSYMS
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cmd_and_fixdep = \
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$(echo-cmd) $(cmd_$(1)); \
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scripts/basic/fixdep $(depfile) $@ '$(make-cmd)' > $(dot-target).tmp;\
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rm -f $(depfile); \
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mv -f $(dot-target).tmp $(dot-target).cmd;
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else
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# Filter out exported kernel symbol names from the preprocessor output.
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# See also __KSYM_DEPS__ in include/linux/export.h.
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# We disable the depfile generation here, so as not to overwrite the existing
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# depfile while fixdep is parsing it.
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flags_nodeps = $(filter-out -Wp$(comma)-M%, $($(1)))
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ksym_dep_filter = \
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case "$(1)" in \
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cc_*_c|cpp_i_c) \
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$(CPP) $(call flags_nodeps,c_flags) -D__KSYM_DEPS__ $< ;; \
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as_*_S|cpp_s_S) \
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$(CPP) $(call flags_nodeps,a_flags) -D__KSYM_DEPS__ $< ;; \
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boot*|build*|cpp_its_S|*cpp_lds_S|dtc|host*|vdso*) : ;; \
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*) echo "Don't know how to preprocess $(1)" >&2; false ;; \
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esac | tr ";" "\n" | sed -n 's/^.*=== __KSYM_\(.*\) ===.*$$/_\1/p'
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cmd_and_fixdep = \
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$(echo-cmd) $(cmd_$(1)); \
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$(ksym_dep_filter) | \
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scripts/basic/fixdep -e $(depfile) $@ '$(make-cmd)' \
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> $(dot-target).tmp; \
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rm -f $(depfile); \
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mv -f $(dot-target).tmp $(dot-target).cmd;
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endif
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# Usage: $(call if_changed_rule,foo)
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# Will check if $(cmd_foo) or any of the prerequisites changed,
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# and if so will execute $(rule_foo).
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if_changed_rule = $(if $(strip $(any-prereq) $(arg-check) ), \
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@set -e; \
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$(rule_$(1)), @:)
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###
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# why - tell why a target got built
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# enabled by make V=2
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# Output (listed in the order they are checked):
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# (1) - due to target is PHONY
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# (2) - due to target missing
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# (3) - due to: file1.h file2.h
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# (4) - due to command line change
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# (5) - due to missing .cmd file
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# (6) - due to target not in $(targets)
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# (1) PHONY targets are always build
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# (2) No target, so we better build it
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# (3) Prerequisite is newer than target
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# (4) The command line stored in the file named dir/.target.cmd
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# differed from actual command line. This happens when compiler
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# options changes
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# (5) No dir/.target.cmd file (used to store command line)
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# (6) No dir/.target.cmd file and target not listed in $(targets)
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# This is a good hint that there is a bug in the kbuild file
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ifeq ($(KBUILD_VERBOSE),2)
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why = \
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$(if $(filter $@, $(PHONY)),- due to target is PHONY, \
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$(if $(wildcard $@), \
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$(if $(strip $(any-prereq)),- due to: $(any-prereq), \
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$(if $(arg-check), \
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$(if $(cmd_$@),- due to command line change, \
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$(if $(filter $@, $(targets)), \
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- due to missing .cmd file, \
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- due to $(notdir $@) not in $$(targets) \
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) \
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) \
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) \
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), \
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- due to target missing \
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) \
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)
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echo-why = $(call escsq, $(strip $(why)))
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endif
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###############################################################################
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#
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# When a Kconfig string contains a filename, it is suitable for
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# passing to shell commands. It is surrounded by double-quotes, and
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# any double-quotes or backslashes within it are escaped by
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# backslashes.
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#
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# This is no use for dependencies or $(wildcard). We need to strip the
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# surrounding quotes and the escaping from quotes and backslashes, and
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# we *do* need to escape any spaces in the string. So, for example:
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#
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# Usage: $(eval $(call config_filename,FOO))
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#
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# Defines FOO_FILENAME based on the contents of the CONFIG_FOO option,
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# transformed as described above to be suitable for use within the
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# makefile.
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#
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# Also, if the filename is a relative filename and exists in the source
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# tree but not the build tree, define FOO_SRCPREFIX as $(srctree)/ to
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# be prefixed to *both* command invocation and dependencies.
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#
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# Note: We also print the filenames in the quiet_cmd_foo text, and
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# perhaps ought to have a version specially escaped for that purpose.
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# But it's only cosmetic, and $(patsubst "%",%,$(CONFIG_FOO)) is good
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# enough. It'll strip the quotes in the common case where there's no
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# space and it's a simple filename, and it'll retain the quotes when
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# there's a space. There are some esoteric cases in which it'll print
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# the wrong thing, but we don't really care. The actual dependencies
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# and commands *do* get it right, with various combinations of single
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# and double quotes, backslashes and spaces in the filenames.
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#
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###############################################################################
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#
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define config_filename
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ifneq ($$(CONFIG_$(1)),"")
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$(1)_FILENAME := $$(subst \\,\,$$(subst \$$(quote),$$(quote),$$(subst $$(space_escape),\$$(space),$$(patsubst "%",%,$$(subst $$(space),$$(space_escape),$$(CONFIG_$(1)))))))
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ifneq ($$(patsubst /%,%,$$(firstword $$($(1)_FILENAME))),$$(firstword $$($(1)_FILENAME)))
|
|
else
|
|
ifeq ($$(wildcard $$($(1)_FILENAME)),)
|
|
ifneq ($$(wildcard $$(srctree)/$$($(1)_FILENAME)),)
|
|
$(1)_SRCPREFIX := $(srctree)/
|
|
endif
|
|
endif
|
|
endif
|
|
endif
|
|
endef
|
|
#
|
|
###############################################################################
|
|
|
|
# delete partially updated (i.e. corrupted) files on error
|
|
.DELETE_ON_ERROR:
|