forked from luck/tmp_suning_uos_patched
7d12e780e0
Maintain a per-CPU global "struct pt_regs *" variable which can be used instead of passing regs around manually through all ~1800 interrupt handlers in the Linux kernel. The regs pointer is used in few places, but it potentially costs both stack space and code to pass it around. On the FRV arch, removing the regs parameter from all the genirq function results in a 20% speed up of the IRQ exit path (ie: from leaving timer_interrupt() to leaving do_IRQ()). Where appropriate, an arch may override the generic storage facility and do something different with the variable. On FRV, for instance, the address is maintained in GR28 at all times inside the kernel as part of general exception handling. Having looked over the code, it appears that the parameter may be handed down through up to twenty or so layers of functions. Consider a USB character device attached to a USB hub, attached to a USB controller that posts its interrupts through a cascaded auxiliary interrupt controller. A character device driver may want to pass regs to the sysrq handler through the input layer which adds another few layers of parameter passing. I've build this code with allyesconfig for x86_64 and i386. I've runtested the main part of the code on FRV and i386, though I can't test most of the drivers. I've also done partial conversion for powerpc and MIPS - these at least compile with minimal configurations. This will affect all archs. Mostly the changes should be relatively easy. Take do_IRQ(), store the regs pointer at the beginning, saving the old one: struct pt_regs *old_regs = set_irq_regs(regs); And put the old one back at the end: set_irq_regs(old_regs); Don't pass regs through to generic_handle_irq() or __do_IRQ(). In timer_interrupt(), this sort of change will be necessary: - update_process_times(user_mode(regs)); - profile_tick(CPU_PROFILING, regs); + update_process_times(user_mode(get_irq_regs())); + profile_tick(CPU_PROFILING); I'd like to move update_process_times()'s use of get_irq_regs() into itself, except that i386, alone of the archs, uses something other than user_mode(). Some notes on the interrupt handling in the drivers: (*) input_dev() is now gone entirely. The regs pointer is no longer stored in the input_dev struct. (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does something different depending on whether it's been supplied with a regs pointer or not. (*) Various IRQ handler function pointers have been moved to type irq_handler_t. Signed-Off-By: David Howells <dhowells@redhat.com> (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
1455 lines
34 KiB
C
1455 lines
34 KiB
C
/*
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* drivers/serial/sh-sci.c
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*
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* SuperH on-chip serial module support. (SCI with no FIFO / with FIFO)
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*
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* Copyright (C) 2002 - 2006 Paul Mundt
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*
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* based off of the old drivers/char/sh-sci.c by:
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*
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* Copyright (C) 1999, 2000 Niibe Yutaka
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* Copyright (C) 2000 Sugioka Toshinobu
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* Modified to support multiple serial ports. Stuart Menefy (May 2000).
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* Modified to support SecureEdge. David McCullough (2002)
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* Modified to support SH7300 SCIF. Takashi Kusuda (Jun 2003).
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#undef DEBUG
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#include <linux/module.h>
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#include <linux/errno.h>
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#include <linux/timer.h>
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#include <linux/interrupt.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial.h>
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#include <linux/major.h>
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#include <linux/string.h>
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#include <linux/sysrq.h>
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#include <linux/ioport.h>
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/console.h>
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#include <linux/platform_device.h>
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#ifdef CONFIG_CPU_FREQ
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#include <linux/notifier.h>
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#include <linux/cpufreq.h>
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#endif
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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#include <asm/clock.h>
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#include <asm/sh_bios.h>
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#include <asm/kgdb.h>
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#endif
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#include <asm/sci.h>
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#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include "sh-sci.h"
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struct sci_port {
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struct uart_port port;
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/* Port type */
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unsigned int type;
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/* Port IRQs: ERI, RXI, TXI, BRI (optional) */
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unsigned int irqs[SCIx_NR_IRQS];
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/* Port pin configuration */
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void (*init_pins)(struct uart_port *port,
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unsigned int cflag);
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/* Port enable callback */
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void (*enable)(struct uart_port *port);
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/* Port disable callback */
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void (*disable)(struct uart_port *port);
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/* Break timer */
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struct timer_list break_timer;
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int break_flag;
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};
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#ifdef CONFIG_SH_KGDB
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static struct sci_port *kgdb_sci_port;
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#endif
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#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
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static struct sci_port *serial_console_port;
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#endif
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/* Function prototypes */
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static void sci_stop_tx(struct uart_port *port);
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#define SCI_NPORTS CONFIG_SERIAL_SH_SCI_NR_UARTS
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static struct sci_port sci_ports[SCI_NPORTS];
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static struct uart_driver sci_uart_driver;
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#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) && \
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defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
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static inline void handle_error(struct uart_port *port)
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{
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/* Clear error flags */
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sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
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}
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static int get_char(struct uart_port *port)
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{
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unsigned long flags;
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unsigned short status;
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int c;
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spin_lock_irqsave(&port->lock, flags);
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do {
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status = sci_in(port, SCxSR);
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if (status & SCxSR_ERRORS(port)) {
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handle_error(port);
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continue;
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}
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} while (!(status & SCxSR_RDxF(port)));
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c = sci_in(port, SCxRDR);
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sci_in(port, SCxSR); /* Dummy read */
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sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
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spin_unlock_irqrestore(&port->lock, flags);
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return c;
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}
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#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
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#if defined(CONFIG_SERIAL_SH_SCI_CONSOLE) || defined(CONFIG_SH_KGDB)
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static void put_char(struct uart_port *port, char c)
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{
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unsigned long flags;
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unsigned short status;
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spin_lock_irqsave(&port->lock, flags);
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do {
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status = sci_in(port, SCxSR);
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} while (!(status & SCxSR_TDxE(port)));
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sci_out(port, SCxTDR, c);
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sci_in(port, SCxSR); /* Dummy read */
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sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
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spin_unlock_irqrestore(&port->lock, flags);
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}
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#endif
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#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
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static void put_string(struct sci_port *sci_port, const char *buffer, int count)
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{
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struct uart_port *port = &sci_port->port;
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const unsigned char *p = buffer;
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int i;
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#if defined(CONFIG_SH_STANDARD_BIOS) || defined(CONFIG_SH_KGDB)
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int checksum;
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int usegdb=0;
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#ifdef CONFIG_SH_STANDARD_BIOS
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/* This call only does a trap the first time it is
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* called, and so is safe to do here unconditionally
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*/
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usegdb |= sh_bios_in_gdb_mode();
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#endif
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#ifdef CONFIG_SH_KGDB
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usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
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#endif
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if (usegdb) {
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/* $<packet info>#<checksum>. */
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do {
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unsigned char c;
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put_char(port, '$');
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put_char(port, 'O'); /* 'O'utput to console */
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checksum = 'O';
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for (i=0; i<count; i++) { /* Don't use run length encoding */
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int h, l;
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c = *p++;
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h = highhex(c);
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l = lowhex(c);
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put_char(port, h);
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put_char(port, l);
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checksum += h + l;
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}
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put_char(port, '#');
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put_char(port, highhex(checksum));
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put_char(port, lowhex(checksum));
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} while (get_char(port) != '+');
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} else
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#endif /* CONFIG_SH_STANDARD_BIOS || CONFIG_SH_KGDB */
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for (i=0; i<count; i++) {
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if (*p == 10)
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put_char(port, '\r');
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put_char(port, *p++);
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}
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}
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#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
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#ifdef CONFIG_SH_KGDB
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static int kgdb_sci_getchar(void)
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{
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int c;
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/* Keep trying to read a character, this could be neater */
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while ((c = get_char(kgdb_sci_port)) < 0)
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cpu_relax();
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return c;
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}
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static inline void kgdb_sci_putchar(int c)
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{
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put_char(kgdb_sci_port, c);
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}
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#endif /* CONFIG_SH_KGDB */
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#if defined(__H8300S__)
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enum { sci_disable, sci_enable };
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static void h8300_sci_config(struct uart_port* port, unsigned int ctrl)
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{
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volatile unsigned char *mstpcrl=(volatile unsigned char *)MSTPCRL;
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int ch = (port->mapbase - SMR0) >> 3;
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unsigned char mask = 1 << (ch+1);
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if (ctrl == sci_disable) {
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*mstpcrl |= mask;
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} else {
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*mstpcrl &= ~mask;
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}
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}
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static inline void h8300_sci_enable(struct uart_port *port)
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{
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h8300_sci_config(port, sci_enable);
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}
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static inline void h8300_sci_disable(struct uart_port *port)
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{
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h8300_sci_config(port, sci_disable);
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}
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#endif
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#if defined(SCI_ONLY) || defined(SCI_AND_SCIF) && \
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defined(__H8300H__) || defined(__H8300S__)
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static void sci_init_pins_sci(struct uart_port* port, unsigned int cflag)
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{
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int ch = (port->mapbase - SMR0) >> 3;
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/* set DDR regs */
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H8300_GPIO_DDR(h8300_sci_pins[ch].port,
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h8300_sci_pins[ch].rx,
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H8300_GPIO_INPUT);
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H8300_GPIO_DDR(h8300_sci_pins[ch].port,
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h8300_sci_pins[ch].tx,
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H8300_GPIO_OUTPUT);
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/* tx mark output*/
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H8300_SCI_DR(ch) |= h8300_sci_pins[ch].tx;
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}
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#else
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#define sci_init_pins_sci NULL
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7707) || defined(CONFIG_CPU_SUBTYPE_SH7709)
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static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
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{
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unsigned int fcr_val = 0;
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if (cflag & CRTSCTS)
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fcr_val |= SCFCR_MCE;
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sci_out(port, SCFCR, fcr_val);
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}
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#else
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#define sci_init_pins_irda NULL
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#endif
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#ifdef SCI_ONLY
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#define sci_init_pins_scif NULL
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#endif
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#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
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#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
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/* SH7300 doesn't use RTS/CTS */
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static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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{
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sci_out(port, SCFCR, 0);
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}
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#elif defined(CONFIG_CPU_SH3)
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/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
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static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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{
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unsigned int fcr_val = 0;
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unsigned short data;
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/* We need to set SCPCR to enable RTS/CTS */
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data = ctrl_inw(SCPCR);
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/* Clear out SCP7MD1,0, SCP6MD1,0, SCP4MD1,0*/
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ctrl_outw(data & 0x0fcf, SCPCR);
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if (cflag & CRTSCTS)
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fcr_val |= SCFCR_MCE;
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else {
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/* We need to set SCPCR to enable RTS/CTS */
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data = ctrl_inw(SCPCR);
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/* Clear out SCP7MD1,0, SCP4MD1,0,
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Set SCP6MD1,0 = {01} (output) */
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ctrl_outw((data & 0x0fcf) | 0x1000, SCPCR);
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data = ctrl_inb(SCPDR);
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/* Set /RTS2 (bit6) = 0 */
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ctrl_outb(data & 0xbf, SCPDR);
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}
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sci_out(port, SCFCR, fcr_val);
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}
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#else
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/* For SH7750 */
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static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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{
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unsigned int fcr_val = 0;
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if (cflag & CRTSCTS) {
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fcr_val |= SCFCR_MCE;
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} else {
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#ifdef CONFIG_CPU_SUBTYPE_SH7343
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/* Nothing */
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#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
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ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
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#else
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ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
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#endif
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}
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sci_out(port, SCFCR, fcr_val);
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}
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
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static inline int scif_txroom(struct uart_port *port)
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{
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return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
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}
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static inline int scif_rxroom(struct uart_port *port)
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{
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return sci_in(port, SCRFDR) & 0x7f;
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}
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#else
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static inline int scif_txroom(struct uart_port *port)
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{
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return SCIF_TXROOM_MAX - (sci_in(port, SCFDR) >> 8);
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}
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static inline int scif_rxroom(struct uart_port *port)
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{
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return sci_in(port, SCFDR) & SCIF_RFDC_MASK;
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}
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#endif
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#endif /* SCIF_ONLY || SCI_AND_SCIF */
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static inline int sci_txroom(struct uart_port *port)
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{
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return ((sci_in(port, SCxSR) & SCI_TDRE) != 0);
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}
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static inline int sci_rxroom(struct uart_port *port)
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{
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return ((sci_in(port, SCxSR) & SCxSR_RDxF(port)) != 0);
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}
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/* ********************************************************************** *
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* the interrupt related routines *
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* ********************************************************************** */
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static void sci_transmit_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->info->xmit;
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unsigned int stopped = uart_tx_stopped(port);
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unsigned short status;
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unsigned short ctrl;
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int count;
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status = sci_in(port, SCxSR);
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if (!(status & SCxSR_TDxE(port))) {
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ctrl = sci_in(port, SCSCR);
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if (uart_circ_empty(xmit)) {
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ctrl &= ~SCI_CTRL_FLAGS_TIE;
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} else {
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ctrl |= SCI_CTRL_FLAGS_TIE;
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}
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sci_out(port, SCSCR, ctrl);
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return;
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}
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#ifndef SCI_ONLY
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if (port->type == PORT_SCIF)
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count = scif_txroom(port);
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else
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#endif
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count = sci_txroom(port);
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do {
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unsigned char c;
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if (port->x_char) {
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c = port->x_char;
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port->x_char = 0;
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} else if (!uart_circ_empty(xmit) && !stopped) {
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c = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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} else {
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break;
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}
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sci_out(port, SCxTDR, c);
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port->icount.tx++;
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} while (--count > 0);
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sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit)) {
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sci_stop_tx(port);
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} else {
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ctrl = sci_in(port, SCSCR);
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#if !defined(SCI_ONLY)
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if (port->type == PORT_SCIF) {
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sci_in(port, SCxSR); /* Dummy read */
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sci_out(port, SCxSR, SCxSR_TDxE_CLEAR(port));
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}
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#endif
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ctrl |= SCI_CTRL_FLAGS_TIE;
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sci_out(port, SCSCR, ctrl);
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}
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}
|
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|
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/* On SH3, SCIF may read end-of-break as a space->mark char */
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#define STEPFN(c) ({int __c=(c); (((__c-1)|(__c)) == -1); })
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|
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static inline void sci_receive_chars(struct uart_port *port)
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{
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struct sci_port *sci_port = (struct sci_port *)port;
|
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struct tty_struct *tty = port->info->tty;
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int i, count, copied = 0;
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unsigned short status;
|
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unsigned char flag;
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|
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status = sci_in(port, SCxSR);
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if (!(status & SCxSR_RDxF(port)))
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return;
|
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|
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while (1) {
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#if !defined(SCI_ONLY)
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if (port->type == PORT_SCIF)
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count = scif_rxroom(port);
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else
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#endif
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count = sci_rxroom(port);
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|
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/* Don't copy more bytes than there is room for in the buffer */
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count = tty_buffer_request_room(tty, count);
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|
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/* If for any reason we can't copy more data, we're done! */
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if (count == 0)
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break;
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|
|
if (port->type == PORT_SCI) {
|
|
char c = sci_in(port, SCxRDR);
|
|
if (uart_handle_sysrq_char(port, c) || sci_port->break_flag)
|
|
count = 0;
|
|
else {
|
|
tty_insert_flip_char(tty, c, TTY_NORMAL);
|
|
}
|
|
} else {
|
|
for (i=0; i<count; i++) {
|
|
char c = sci_in(port, SCxRDR);
|
|
status = sci_in(port, SCxSR);
|
|
#if defined(CONFIG_CPU_SH3)
|
|
/* Skip "chars" during break */
|
|
if (sci_port->break_flag) {
|
|
if ((c == 0) &&
|
|
(status & SCxSR_FER(port))) {
|
|
count--; i--;
|
|
continue;
|
|
}
|
|
|
|
/* Nonzero => end-of-break */
|
|
pr_debug("scif: debounce<%02x>\n", c);
|
|
sci_port->break_flag = 0;
|
|
|
|
if (STEPFN(c)) {
|
|
count--; i--;
|
|
continue;
|
|
}
|
|
}
|
|
#endif /* CONFIG_CPU_SH3 */
|
|
if (uart_handle_sysrq_char(port, c)) {
|
|
count--; i--;
|
|
continue;
|
|
}
|
|
|
|
/* Store data and status */
|
|
if (status&SCxSR_FER(port)) {
|
|
flag = TTY_FRAME;
|
|
pr_debug("sci: frame error\n");
|
|
} else if (status&SCxSR_PER(port)) {
|
|
flag = TTY_PARITY;
|
|
pr_debug("sci: parity error\n");
|
|
} else
|
|
flag = TTY_NORMAL;
|
|
tty_insert_flip_char(tty, c, flag);
|
|
}
|
|
}
|
|
|
|
sci_in(port, SCxSR); /* dummy read */
|
|
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
|
|
|
|
copied += count;
|
|
port->icount.rx += count;
|
|
}
|
|
|
|
if (copied) {
|
|
/* Tell the rest of the system the news. New characters! */
|
|
tty_flip_buffer_push(tty);
|
|
} else {
|
|
sci_in(port, SCxSR); /* dummy read */
|
|
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
|
|
}
|
|
}
|
|
|
|
#define SCI_BREAK_JIFFIES (HZ/20)
|
|
/* The sci generates interrupts during the break,
|
|
* 1 per millisecond or so during the break period, for 9600 baud.
|
|
* So dont bother disabling interrupts.
|
|
* But dont want more than 1 break event.
|
|
* Use a kernel timer to periodically poll the rx line until
|
|
* the break is finished.
|
|
*/
|
|
static void sci_schedule_break_timer(struct sci_port *port)
|
|
{
|
|
port->break_timer.expires = jiffies + SCI_BREAK_JIFFIES;
|
|
add_timer(&port->break_timer);
|
|
}
|
|
/* Ensure that two consecutive samples find the break over. */
|
|
static void sci_break_timer(unsigned long data)
|
|
{
|
|
struct sci_port *port = (struct sci_port *)data;
|
|
|
|
if (sci_rxd_in(&port->port) == 0) {
|
|
port->break_flag = 1;
|
|
sci_schedule_break_timer(port);
|
|
} else if (port->break_flag == 1) {
|
|
/* break is over. */
|
|
port->break_flag = 2;
|
|
sci_schedule_break_timer(port);
|
|
} else
|
|
port->break_flag = 0;
|
|
}
|
|
|
|
static inline int sci_handle_errors(struct uart_port *port)
|
|
{
|
|
int copied = 0;
|
|
unsigned short status = sci_in(port, SCxSR);
|
|
struct tty_struct *tty = port->info->tty;
|
|
|
|
if (status & SCxSR_ORER(port)) {
|
|
/* overrun error */
|
|
if (tty_insert_flip_char(tty, 0, TTY_OVERRUN))
|
|
copied++;
|
|
pr_debug("sci: overrun error\n");
|
|
}
|
|
|
|
if (status & SCxSR_FER(port)) {
|
|
if (sci_rxd_in(port) == 0) {
|
|
/* Notify of BREAK */
|
|
struct sci_port *sci_port = (struct sci_port *)port;
|
|
|
|
if (!sci_port->break_flag) {
|
|
sci_port->break_flag = 1;
|
|
sci_schedule_break_timer(sci_port);
|
|
|
|
/* Do sysrq handling. */
|
|
if (uart_handle_break(port))
|
|
return 0;
|
|
pr_debug("sci: BREAK detected\n");
|
|
if (tty_insert_flip_char(tty, 0, TTY_BREAK))
|
|
copied++;
|
|
}
|
|
} else {
|
|
/* frame error */
|
|
if (tty_insert_flip_char(tty, 0, TTY_FRAME))
|
|
copied++;
|
|
pr_debug("sci: frame error\n");
|
|
}
|
|
}
|
|
|
|
if (status & SCxSR_PER(port)) {
|
|
/* parity error */
|
|
if (tty_insert_flip_char(tty, 0, TTY_PARITY))
|
|
copied++;
|
|
pr_debug("sci: parity error\n");
|
|
}
|
|
|
|
if (copied)
|
|
tty_flip_buffer_push(tty);
|
|
|
|
return copied;
|
|
}
|
|
|
|
static inline int sci_handle_breaks(struct uart_port *port)
|
|
{
|
|
int copied = 0;
|
|
unsigned short status = sci_in(port, SCxSR);
|
|
struct tty_struct *tty = port->info->tty;
|
|
struct sci_port *s = &sci_ports[port->line];
|
|
|
|
if (!s->break_flag && status & SCxSR_BRK(port)) {
|
|
#if defined(CONFIG_CPU_SH3)
|
|
/* Debounce break */
|
|
s->break_flag = 1;
|
|
#endif
|
|
/* Notify of BREAK */
|
|
if (tty_insert_flip_char(tty, 0, TTY_BREAK))
|
|
copied++;
|
|
pr_debug("sci: BREAK detected\n");
|
|
}
|
|
|
|
#if defined(SCIF_ORER)
|
|
/* XXX: Handle SCIF overrun error */
|
|
if (port->type == PORT_SCIF && (sci_in(port, SCLSR) & SCIF_ORER) != 0) {
|
|
sci_out(port, SCLSR, 0);
|
|
if (tty_insert_flip_char(tty, 0, TTY_OVERRUN)) {
|
|
copied++;
|
|
pr_debug("sci: overrun error\n");
|
|
}
|
|
}
|
|
#endif
|
|
|
|
if (copied)
|
|
tty_flip_buffer_push(tty);
|
|
|
|
return copied;
|
|
}
|
|
|
|
static irqreturn_t sci_rx_interrupt(int irq, void *port)
|
|
{
|
|
/* I think sci_receive_chars has to be called irrespective
|
|
* of whether the I_IXOFF is set, otherwise, how is the interrupt
|
|
* to be disabled?
|
|
*/
|
|
sci_receive_chars(port);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t sci_tx_interrupt(int irq, void *ptr)
|
|
{
|
|
struct uart_port *port = ptr;
|
|
|
|
spin_lock_irq(&port->lock);
|
|
sci_transmit_chars(port);
|
|
spin_unlock_irq(&port->lock);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t sci_er_interrupt(int irq, void *ptr)
|
|
{
|
|
struct uart_port *port = ptr;
|
|
|
|
/* Handle errors */
|
|
if (port->type == PORT_SCI) {
|
|
if (sci_handle_errors(port)) {
|
|
/* discard character in rx buffer */
|
|
sci_in(port, SCxSR);
|
|
sci_out(port, SCxSR, SCxSR_RDxF_CLEAR(port));
|
|
}
|
|
} else {
|
|
#if defined(SCIF_ORER)
|
|
if((sci_in(port, SCLSR) & SCIF_ORER) != 0) {
|
|
struct tty_struct *tty = port->info->tty;
|
|
|
|
sci_out(port, SCLSR, 0);
|
|
tty_insert_flip_char(tty, 0, TTY_OVERRUN);
|
|
tty_flip_buffer_push(tty);
|
|
pr_debug("scif: overrun error\n");
|
|
}
|
|
#endif
|
|
sci_rx_interrupt(irq, ptr);
|
|
}
|
|
|
|
sci_out(port, SCxSR, SCxSR_ERROR_CLEAR(port));
|
|
|
|
/* Kick the transmission */
|
|
sci_tx_interrupt(irq, ptr);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t sci_br_interrupt(int irq, void *ptr)
|
|
{
|
|
struct uart_port *port = ptr;
|
|
|
|
/* Handle BREAKs */
|
|
sci_handle_breaks(port);
|
|
|
|
#ifdef CONFIG_SH_KGDB
|
|
/* Break into the debugger if a break is detected */
|
|
BREAKPOINT();
|
|
#endif
|
|
|
|
sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t sci_mpxed_interrupt(int irq, void *ptr)
|
|
{
|
|
unsigned short ssr_status, scr_status;
|
|
struct uart_port *port = ptr;
|
|
|
|
ssr_status = sci_in(port,SCxSR);
|
|
scr_status = sci_in(port,SCSCR);
|
|
|
|
/* Tx Interrupt */
|
|
if ((ssr_status & 0x0020) && (scr_status & 0x0080))
|
|
sci_tx_interrupt(irq, ptr);
|
|
/* Rx Interrupt */
|
|
if ((ssr_status & 0x0002) && (scr_status & 0x0040))
|
|
sci_rx_interrupt(irq, ptr);
|
|
/* Error Interrupt */
|
|
if ((ssr_status & 0x0080) && (scr_status & 0x0400))
|
|
sci_er_interrupt(irq, ptr);
|
|
/* Break Interrupt */
|
|
if ((ssr_status & 0x0010) && (scr_status & 0x0200))
|
|
sci_br_interrupt(irq, ptr);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
/*
|
|
* Here we define a transistion notifier so that we can update all of our
|
|
* ports' baud rate when the peripheral clock changes.
|
|
*/
|
|
static int sci_notifier(struct notifier_block *self,
|
|
unsigned long phase, void *p)
|
|
{
|
|
struct cpufreq_freqs *freqs = p;
|
|
int i;
|
|
|
|
if ((phase == CPUFREQ_POSTCHANGE) ||
|
|
(phase == CPUFREQ_RESUMECHANGE)){
|
|
for (i = 0; i < SCI_NPORTS; i++) {
|
|
struct uart_port *port = &sci_ports[i].port;
|
|
struct clk *clk;
|
|
|
|
/*
|
|
* Update the uartclk per-port if frequency has
|
|
* changed, since it will no longer necessarily be
|
|
* consistent with the old frequency.
|
|
*
|
|
* Really we want to be able to do something like
|
|
* uart_change_speed() or something along those lines
|
|
* here to implicitly reset the per-port baud rate..
|
|
*
|
|
* Clean this up later..
|
|
*/
|
|
clk = clk_get("module_clk");
|
|
port->uartclk = clk_get_rate(clk) * 16;
|
|
clk_put(clk);
|
|
}
|
|
|
|
printk(KERN_INFO "%s: got a postchange notification "
|
|
"for cpu %d (old %d, new %d)\n",
|
|
__FUNCTION__, freqs->cpu, freqs->old, freqs->new);
|
|
}
|
|
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static struct notifier_block sci_nb = { &sci_notifier, NULL, 0 };
|
|
#endif /* CONFIG_CPU_FREQ */
|
|
|
|
static int sci_request_irq(struct sci_port *port)
|
|
{
|
|
int i;
|
|
irqreturn_t (*handlers[4])(int irq, void *ptr) = {
|
|
sci_er_interrupt, sci_rx_interrupt, sci_tx_interrupt,
|
|
sci_br_interrupt,
|
|
};
|
|
const char *desc[] = { "SCI Receive Error", "SCI Receive Data Full",
|
|
"SCI Transmit Data Empty", "SCI Break" };
|
|
|
|
if (port->irqs[0] == port->irqs[1]) {
|
|
if (!port->irqs[0]) {
|
|
printk(KERN_ERR "sci: Cannot allocate irq.(IRQ=0)\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
if (request_irq(port->irqs[0], sci_mpxed_interrupt,
|
|
SA_INTERRUPT, "sci", port)) {
|
|
printk(KERN_ERR "sci: Cannot allocate irq.\n");
|
|
return -ENODEV;
|
|
}
|
|
} else {
|
|
for (i = 0; i < ARRAY_SIZE(handlers); i++) {
|
|
if (!port->irqs[i])
|
|
continue;
|
|
if (request_irq(port->irqs[i], handlers[i],
|
|
SA_INTERRUPT, desc[i], port)) {
|
|
printk(KERN_ERR "sci: Cannot allocate irq.\n");
|
|
return -ENODEV;
|
|
}
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void sci_free_irq(struct sci_port *port)
|
|
{
|
|
int i;
|
|
|
|
if (port->irqs[0] == port->irqs[1]) {
|
|
if (!port->irqs[0])
|
|
printk("sci: sci_free_irq error\n");
|
|
else
|
|
free_irq(port->irqs[0], port);
|
|
} else {
|
|
for (i = 0; i < ARRAY_SIZE(port->irqs); i++) {
|
|
if (!port->irqs[i])
|
|
continue;
|
|
|
|
free_irq(port->irqs[i], port);
|
|
}
|
|
}
|
|
}
|
|
|
|
static unsigned int sci_tx_empty(struct uart_port *port)
|
|
{
|
|
/* Can't detect */
|
|
return TIOCSER_TEMT;
|
|
}
|
|
|
|
static void sci_set_mctrl(struct uart_port *port, unsigned int mctrl)
|
|
{
|
|
/* This routine is used for seting signals of: DTR, DCD, CTS/RTS */
|
|
/* We use SCIF's hardware for CTS/RTS, so don't need any for that. */
|
|
/* If you have signals for DTR and DCD, please implement here. */
|
|
}
|
|
|
|
static unsigned int sci_get_mctrl(struct uart_port *port)
|
|
{
|
|
/* This routine is used for geting signals of: DTR, DCD, DSR, RI,
|
|
and CTS/RTS */
|
|
|
|
return TIOCM_DTR | TIOCM_RTS | TIOCM_DSR;
|
|
}
|
|
|
|
static void sci_start_tx(struct uart_port *port)
|
|
{
|
|
unsigned short ctrl;
|
|
|
|
/* Set TIE (Transmit Interrupt Enable) bit in SCSCR */
|
|
ctrl = sci_in(port, SCSCR);
|
|
ctrl |= SCI_CTRL_FLAGS_TIE;
|
|
sci_out(port, SCSCR, ctrl);
|
|
}
|
|
|
|
static void sci_stop_tx(struct uart_port *port)
|
|
{
|
|
unsigned short ctrl;
|
|
|
|
/* Clear TIE (Transmit Interrupt Enable) bit in SCSCR */
|
|
ctrl = sci_in(port, SCSCR);
|
|
ctrl &= ~SCI_CTRL_FLAGS_TIE;
|
|
sci_out(port, SCSCR, ctrl);
|
|
}
|
|
|
|
static void sci_start_rx(struct uart_port *port, unsigned int tty_start)
|
|
{
|
|
unsigned short ctrl;
|
|
|
|
/* Set RIE (Receive Interrupt Enable) bit in SCSCR */
|
|
ctrl = sci_in(port, SCSCR);
|
|
ctrl |= SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE;
|
|
sci_out(port, SCSCR, ctrl);
|
|
}
|
|
|
|
static void sci_stop_rx(struct uart_port *port)
|
|
{
|
|
unsigned short ctrl;
|
|
|
|
/* Clear RIE (Receive Interrupt Enable) bit in SCSCR */
|
|
ctrl = sci_in(port, SCSCR);
|
|
ctrl &= ~(SCI_CTRL_FLAGS_RIE | SCI_CTRL_FLAGS_REIE);
|
|
sci_out(port, SCSCR, ctrl);
|
|
}
|
|
|
|
static void sci_enable_ms(struct uart_port *port)
|
|
{
|
|
/* Nothing here yet .. */
|
|
}
|
|
|
|
static void sci_break_ctl(struct uart_port *port, int break_state)
|
|
{
|
|
/* Nothing here yet .. */
|
|
}
|
|
|
|
static int sci_startup(struct uart_port *port)
|
|
{
|
|
struct sci_port *s = &sci_ports[port->line];
|
|
|
|
if (s->enable)
|
|
s->enable(port);
|
|
|
|
sci_request_irq(s);
|
|
sci_start_tx(port);
|
|
sci_start_rx(port, 1);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void sci_shutdown(struct uart_port *port)
|
|
{
|
|
struct sci_port *s = &sci_ports[port->line];
|
|
|
|
sci_stop_rx(port);
|
|
sci_stop_tx(port);
|
|
sci_free_irq(s);
|
|
|
|
if (s->disable)
|
|
s->disable(port);
|
|
}
|
|
|
|
static void sci_set_termios(struct uart_port *port, struct termios *termios,
|
|
struct termios *old)
|
|
{
|
|
struct sci_port *s = &sci_ports[port->line];
|
|
unsigned int status, baud, smr_val;
|
|
unsigned long flags;
|
|
int t;
|
|
|
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
|
|
|
switch (baud) {
|
|
case 0:
|
|
t = -1;
|
|
break;
|
|
default:
|
|
{
|
|
#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
|
|
struct clk *clk = clk_get("module_clk");
|
|
t = SCBRR_VALUE(baud, clk_get_rate(clk));
|
|
clk_put(clk);
|
|
#else
|
|
t = SCBRR_VALUE(baud);
|
|
#endif
|
|
}
|
|
break;
|
|
}
|
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
do {
|
|
status = sci_in(port, SCxSR);
|
|
} while (!(status & SCxSR_TEND(port)));
|
|
|
|
sci_out(port, SCSCR, 0x00); /* TE=0, RE=0, CKE1=0 */
|
|
|
|
#if !defined(SCI_ONLY)
|
|
if (port->type == PORT_SCIF)
|
|
sci_out(port, SCFCR, SCFCR_RFRST | SCFCR_TFRST);
|
|
#endif
|
|
|
|
smr_val = sci_in(port, SCSMR) & 3;
|
|
if ((termios->c_cflag & CSIZE) == CS7)
|
|
smr_val |= 0x40;
|
|
if (termios->c_cflag & PARENB)
|
|
smr_val |= 0x20;
|
|
if (termios->c_cflag & PARODD)
|
|
smr_val |= 0x30;
|
|
if (termios->c_cflag & CSTOPB)
|
|
smr_val |= 0x08;
|
|
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
sci_out(port, SCSMR, smr_val);
|
|
|
|
if (t > 0) {
|
|
if(t >= 256) {
|
|
sci_out(port, SCSMR, (sci_in(port, SCSMR) & ~3) | 1);
|
|
t >>= 2;
|
|
} else {
|
|
sci_out(port, SCSMR, sci_in(port, SCSMR) & ~3);
|
|
}
|
|
sci_out(port, SCBRR, t);
|
|
udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */
|
|
}
|
|
|
|
if (likely(s->init_pins))
|
|
s->init_pins(port, termios->c_cflag);
|
|
|
|
sci_out(port, SCSCR, SCSCR_INIT(port));
|
|
|
|
if ((termios->c_cflag & CREAD) != 0)
|
|
sci_start_rx(port,0);
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
static const char *sci_type(struct uart_port *port)
|
|
{
|
|
switch (port->type) {
|
|
case PORT_SCI: return "sci";
|
|
case PORT_SCIF: return "scif";
|
|
case PORT_IRDA: return "irda";
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void sci_release_port(struct uart_port *port)
|
|
{
|
|
/* Nothing here yet .. */
|
|
}
|
|
|
|
static int sci_request_port(struct uart_port *port)
|
|
{
|
|
/* Nothing here yet .. */
|
|
return 0;
|
|
}
|
|
|
|
static void sci_config_port(struct uart_port *port, int flags)
|
|
{
|
|
struct sci_port *s = &sci_ports[port->line];
|
|
|
|
port->type = s->type;
|
|
|
|
switch (port->type) {
|
|
case PORT_SCI:
|
|
s->init_pins = sci_init_pins_sci;
|
|
break;
|
|
case PORT_SCIF:
|
|
s->init_pins = sci_init_pins_scif;
|
|
break;
|
|
case PORT_IRDA:
|
|
s->init_pins = sci_init_pins_irda;
|
|
break;
|
|
}
|
|
|
|
#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
|
|
if (port->mapbase == 0)
|
|
port->mapbase = onchip_remap(SCIF_ADDR_SH5, 1024, "SCIF");
|
|
|
|
port->membase = (void __iomem *)port->mapbase;
|
|
#endif
|
|
}
|
|
|
|
static int sci_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
struct sci_port *s = &sci_ports[port->line];
|
|
|
|
if (ser->irq != s->irqs[SCIx_TXI_IRQ] || ser->irq > NR_IRQS)
|
|
return -EINVAL;
|
|
if (ser->baud_base < 2400)
|
|
/* No paper tape reader for Mitch.. */
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct uart_ops sci_uart_ops = {
|
|
.tx_empty = sci_tx_empty,
|
|
.set_mctrl = sci_set_mctrl,
|
|
.get_mctrl = sci_get_mctrl,
|
|
.start_tx = sci_start_tx,
|
|
.stop_tx = sci_stop_tx,
|
|
.stop_rx = sci_stop_rx,
|
|
.enable_ms = sci_enable_ms,
|
|
.break_ctl = sci_break_ctl,
|
|
.startup = sci_startup,
|
|
.shutdown = sci_shutdown,
|
|
.set_termios = sci_set_termios,
|
|
.type = sci_type,
|
|
.release_port = sci_release_port,
|
|
.request_port = sci_request_port,
|
|
.config_port = sci_config_port,
|
|
.verify_port = sci_verify_port,
|
|
};
|
|
|
|
static void __init sci_init_ports(void)
|
|
{
|
|
static int first = 1;
|
|
int i;
|
|
|
|
if (!first)
|
|
return;
|
|
|
|
first = 0;
|
|
|
|
for (i = 0; i < SCI_NPORTS; i++) {
|
|
sci_ports[i].port.ops = &sci_uart_ops;
|
|
sci_ports[i].port.iotype = UPIO_MEM;
|
|
sci_ports[i].port.line = i;
|
|
sci_ports[i].port.fifosize = 1;
|
|
|
|
#if defined(__H8300H__) || defined(__H8300S__)
|
|
#ifdef __H8300S__
|
|
sci_ports[i].enable = h8300_sci_enable;
|
|
sci_ports[i].disable = h8300_sci_disable;
|
|
#endif
|
|
sci_ports[i].port.uartclk = CONFIG_CPU_CLOCK;
|
|
#elif defined(CONFIG_SUPERH64)
|
|
sci_ports[i].port.uartclk = current_cpu_data.module_clock * 16;
|
|
#else
|
|
/*
|
|
* XXX: We should use a proper SCI/SCIF clock
|
|
*/
|
|
{
|
|
struct clk *clk = clk_get("module_clk");
|
|
sci_ports[i].port.uartclk = clk_get_rate(clk) * 16;
|
|
clk_put(clk);
|
|
}
|
|
#endif
|
|
|
|
sci_ports[i].break_timer.data = (unsigned long)&sci_ports[i];
|
|
sci_ports[i].break_timer.function = sci_break_timer;
|
|
|
|
init_timer(&sci_ports[i].break_timer);
|
|
}
|
|
}
|
|
|
|
int __init early_sci_setup(struct uart_port *port)
|
|
{
|
|
if (unlikely(port->line > SCI_NPORTS))
|
|
return -ENODEV;
|
|
|
|
sci_init_ports();
|
|
|
|
sci_ports[port->line].port.membase = port->membase;
|
|
sci_ports[port->line].port.mapbase = port->mapbase;
|
|
sci_ports[port->line].port.type = port->type;
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_SERIAL_SH_SCI_CONSOLE
|
|
/*
|
|
* Print a string to the serial port trying not to disturb
|
|
* any possible real use of the port...
|
|
*/
|
|
static void serial_console_write(struct console *co, const char *s,
|
|
unsigned count)
|
|
{
|
|
put_string(serial_console_port, s, count);
|
|
}
|
|
|
|
static int __init serial_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port;
|
|
int baud = 115200;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
int ret;
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
if (co->index >= SCI_NPORTS)
|
|
co->index = 0;
|
|
|
|
serial_console_port = &sci_ports[co->index];
|
|
port = &serial_console_port->port;
|
|
|
|
/*
|
|
* Also need to check port->type, we don't actually have any
|
|
* UPIO_PORT ports, but uart_report_port() handily misreports
|
|
* it anyways if we don't have a port available by the time this is
|
|
* called.
|
|
*/
|
|
if (!port->type)
|
|
return -ENODEV;
|
|
if (!port->membase || !port->mapbase)
|
|
return -ENODEV;
|
|
|
|
spin_lock_init(&port->lock);
|
|
|
|
port->type = serial_console_port->type;
|
|
|
|
if (port->flags & UPF_IOREMAP)
|
|
sci_config_port(port, 0);
|
|
|
|
if (serial_console_port->enable)
|
|
serial_console_port->enable(port);
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
ret = uart_set_options(port, co, baud, parity, bits, flow);
|
|
#if defined(__H8300H__) || defined(__H8300S__)
|
|
/* disable rx interrupt */
|
|
if (ret == 0)
|
|
sci_stop_rx(port);
|
|
#endif
|
|
return ret;
|
|
}
|
|
|
|
static struct console serial_console = {
|
|
.name = "ttySC",
|
|
.device = uart_console_device,
|
|
.write = serial_console_write,
|
|
.setup = serial_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &sci_uart_driver,
|
|
};
|
|
|
|
static int __init sci_console_init(void)
|
|
{
|
|
sci_init_ports();
|
|
register_console(&serial_console);
|
|
return 0;
|
|
}
|
|
console_initcall(sci_console_init);
|
|
#endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */
|
|
|
|
#ifdef CONFIG_SH_KGDB
|
|
/*
|
|
* FIXME: Most of this can go away.. at the moment, we rely on
|
|
* arch/sh/kernel/setup.c to do the command line parsing for kgdb, though
|
|
* most of that can easily be done here instead.
|
|
*
|
|
* For the time being, just accept the values that were parsed earlier..
|
|
*/
|
|
static void __init kgdb_console_get_options(struct uart_port *port, int *baud,
|
|
int *parity, int *bits)
|
|
{
|
|
*baud = kgdb_baud;
|
|
*parity = tolower(kgdb_parity);
|
|
*bits = kgdb_bits - '0';
|
|
}
|
|
|
|
/*
|
|
* The naming here is somewhat misleading, since kgdb_console_setup() takes
|
|
* care of the early-on initialization for kgdb, regardless of whether we
|
|
* actually use kgdb as a console or not.
|
|
*
|
|
* On the plus side, this lets us kill off the old kgdb_sci_setup() nonsense.
|
|
*/
|
|
int __init kgdb_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port = &sci_ports[kgdb_portnum].port;
|
|
int baud = 38400;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
spin_lock_init(&port->lock);
|
|
|
|
if (co->index != kgdb_portnum)
|
|
co->index = kgdb_portnum;
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
kgdb_console_get_options(port, &baud, &parity, &bits);
|
|
|
|
kgdb_getchar = kgdb_sci_getchar;
|
|
kgdb_putchar = kgdb_sci_putchar;
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
#endif /* CONFIG_SH_KGDB */
|
|
|
|
#ifdef CONFIG_SH_KGDB_CONSOLE
|
|
static struct console kgdb_console = {
|
|
.name = "ttySC",
|
|
.write = kgdb_console_write,
|
|
.setup = kgdb_console_setup,
|
|
.flags = CON_PRINTBUFFER | CON_ENABLED,
|
|
.index = -1,
|
|
.data = &sci_uart_driver,
|
|
};
|
|
|
|
/* Register the KGDB console so we get messages (d'oh!) */
|
|
static int __init kgdb_console_init(void)
|
|
{
|
|
sci_init_ports();
|
|
register_console(&kgdb_console);
|
|
return 0;
|
|
}
|
|
console_initcall(kgdb_console_init);
|
|
#endif /* CONFIG_SH_KGDB_CONSOLE */
|
|
|
|
#if defined(CONFIG_SH_KGDB_CONSOLE)
|
|
#define SCI_CONSOLE &kgdb_console
|
|
#elif defined(CONFIG_SERIAL_SH_SCI_CONSOLE)
|
|
#define SCI_CONSOLE &serial_console
|
|
#else
|
|
#define SCI_CONSOLE 0
|
|
#endif
|
|
|
|
static char banner[] __initdata =
|
|
KERN_INFO "SuperH SCI(F) driver initialized\n";
|
|
|
|
static struct uart_driver sci_uart_driver = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "sci",
|
|
.dev_name = "ttySC",
|
|
.major = SCI_MAJOR,
|
|
.minor = SCI_MINOR_START,
|
|
.nr = SCI_NPORTS,
|
|
.cons = SCI_CONSOLE,
|
|
};
|
|
|
|
/*
|
|
* Register a set of serial devices attached to a platform device. The
|
|
* list is terminated with a zero flags entry, which means we expect
|
|
* all entries to have at least UPF_BOOT_AUTOCONF set. Platforms that need
|
|
* remapping (such as sh64) should also set UPF_IOREMAP.
|
|
*/
|
|
static int __devinit sci_probe(struct platform_device *dev)
|
|
{
|
|
struct plat_sci_port *p = dev->dev.platform_data;
|
|
int i;
|
|
|
|
for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
|
|
struct sci_port *sciport = &sci_ports[i];
|
|
|
|
sciport->port.mapbase = p->mapbase;
|
|
|
|
/*
|
|
* For the simple (and majority of) cases where we don't need
|
|
* to do any remapping, just cast the cookie directly.
|
|
*/
|
|
if (p->mapbase && !p->membase && !(p->flags & UPF_IOREMAP))
|
|
p->membase = (void __iomem *)p->mapbase;
|
|
|
|
sciport->port.membase = p->membase;
|
|
|
|
sciport->port.irq = p->irqs[SCIx_TXI_IRQ];
|
|
sciport->port.flags = p->flags;
|
|
sciport->port.dev = &dev->dev;
|
|
|
|
sciport->type = sciport->port.type = p->type;
|
|
|
|
memcpy(&sciport->irqs, &p->irqs, sizeof(p->irqs));
|
|
|
|
uart_add_one_port(&sci_uart_driver, &sciport->port);
|
|
}
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
|
|
dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
|
|
#endif
|
|
|
|
#ifdef CONFIG_SH_STANDARD_BIOS
|
|
sh_bios_gdb_detach();
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __devexit sci_remove(struct platform_device *dev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < SCI_NPORTS; i++)
|
|
uart_remove_one_port(&sci_uart_driver, &sci_ports[i].port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sci_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < SCI_NPORTS; i++) {
|
|
struct sci_port *p = &sci_ports[i];
|
|
|
|
if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
|
|
uart_suspend_port(&sci_uart_driver, &p->port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sci_resume(struct platform_device *dev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < SCI_NPORTS; i++) {
|
|
struct sci_port *p = &sci_ports[i];
|
|
|
|
if (p->type != PORT_UNKNOWN && p->port.dev == &dev->dev)
|
|
uart_resume_port(&sci_uart_driver, &p->port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver sci_driver = {
|
|
.probe = sci_probe,
|
|
.remove = __devexit_p(sci_remove),
|
|
.suspend = sci_suspend,
|
|
.resume = sci_resume,
|
|
.driver = {
|
|
.name = "sh-sci",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __init sci_init(void)
|
|
{
|
|
int ret;
|
|
|
|
printk(banner);
|
|
|
|
sci_init_ports();
|
|
|
|
ret = uart_register_driver(&sci_uart_driver);
|
|
if (likely(ret == 0)) {
|
|
ret = platform_driver_register(&sci_driver);
|
|
if (unlikely(ret))
|
|
uart_unregister_driver(&sci_uart_driver);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit sci_exit(void)
|
|
{
|
|
platform_driver_unregister(&sci_driver);
|
|
uart_unregister_driver(&sci_uart_driver);
|
|
}
|
|
|
|
module_init(sci_init);
|
|
module_exit(sci_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|