forked from luck/tmp_suning_uos_patched
49f680ea7b
The current vector entry system does not allow for SMP. In order to work around this, we need to eliminate our reliance on the fixed save areas, which breaks the way we enable alignment traps. This patch makes the alignment trap enable code independent of the way we handle the save areas. Signed-off-by: Russell King <rmk@arm.linux.org.uk>
85 lines
1.6 KiB
ArmAsm
85 lines
1.6 KiB
ArmAsm
#include <linux/config.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/constants.h>
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#include <asm/errno.h>
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#include <asm/thread_info.h>
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@ Bad Abort numbers
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@ -----------------
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@
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#define BAD_PREFETCH 0
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#define BAD_DATA 1
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#define BAD_ADDREXCPTN 2
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#define BAD_IRQ 3
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#define BAD_UNDEFINSTR 4
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@
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@ Most of the stack format comes from struct pt_regs, but with
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@ the addition of 8 bytes for storing syscall args 5 and 6.
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@
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#define S_OFF 8
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/*
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* The SWI code relies on the fact that R0 is at the bottom of the stack
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* (due to slow/fast restore user regs).
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*/
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#if S_R0 != 0
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#error "Please fix"
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#endif
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.macro zero_fp
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#ifdef CONFIG_FRAME_POINTER
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mov fp, #0
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#endif
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.endm
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#if __LINUX_ARM_ARCH__ >= 6
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.macro disable_irq
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cpsid i
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.endm
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.macro enable_irq
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cpsie i
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.endm
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#else
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.macro disable_irq
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msr cpsr_c, #PSR_I_BIT | SVC_MODE
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.endm
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.macro enable_irq
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msr cpsr_c, #SVC_MODE
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.endm
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#endif
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.macro get_thread_info, rd
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mov \rd, sp, lsr #13
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mov \rd, \rd, lsl #13
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.endm
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.macro alignment_trap, rtemp
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#ifdef CONFIG_ALIGNMENT_TRAP
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ldr \rtemp, .LCcralign
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ldr \rtemp, [\rtemp]
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mcr p15, 0, \rtemp, c1, c0
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#endif
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.endm
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/*
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* These are the registers used in the syscall handler, and allow us to
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* have in theory up to 7 arguments to a function - r0 to r6.
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*
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* r7 is reserved for the system call number for thumb mode.
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*
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* Note that tbl == why is intentional.
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*
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* We must set at least "tsk" and "why" when calling ret_with_reschedule.
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*/
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scno .req r7 @ syscall number
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tbl .req r8 @ syscall table pointer
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why .req r8 @ Linux syscall (!= 0)
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tsk .req r9 @ current thread_info
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