forked from luck/tmp_suning_uos_patched
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
730 lines
20 KiB
C
730 lines
20 KiB
C
/* $Id: unaligned.c,v 1.24 2002/02/09 19:49:31 davem Exp $
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* unaligned.c: Unaligned load/store trap handling with special
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* cases for the kernel to do them more quickly.
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*
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* Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/module.h>
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#include <asm/asi.h>
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#include <asm/ptrace.h>
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#include <asm/pstate.h>
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/bitops.h>
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#include <asm/fpumacro.h>
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/* #define DEBUG_MNA */
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enum direction {
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load, /* ld, ldd, ldh, ldsh */
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store, /* st, std, sth, stsh */
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both, /* Swap, ldstub, cas, ... */
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fpld,
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fpst,
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invalid,
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};
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#ifdef DEBUG_MNA
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static char *dirstrings[] = {
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"load", "store", "both", "fpload", "fpstore", "invalid"
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};
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#endif
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static inline enum direction decode_direction(unsigned int insn)
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{
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unsigned long tmp = (insn >> 21) & 1;
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if (!tmp)
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return load;
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else {
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switch ((insn>>19)&0xf) {
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case 15: /* swap* */
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return both;
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default:
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return store;
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}
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}
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}
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/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
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static inline int decode_access_size(unsigned int insn)
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{
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unsigned int tmp;
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tmp = ((insn >> 19) & 0xf);
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if (tmp == 11 || tmp == 14) /* ldx/stx */
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return 8;
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tmp &= 3;
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if (!tmp)
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return 4;
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else if (tmp == 3)
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return 16; /* ldd/std - Although it is actually 8 */
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else if (tmp == 2)
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return 2;
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else {
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printk("Impossible unaligned trap. insn=%08x\n", insn);
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die_if_kernel("Byte sized unaligned access?!?!", current_thread_info()->kregs);
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/* GCC should never warn that control reaches the end
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* of this function without returning a value because
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* die_if_kernel() is marked with attribute 'noreturn'.
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* Alas, some versions do...
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*/
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return 0;
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}
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}
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static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
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{
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if (insn & 0x800000) {
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if (insn & 0x2000)
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return (unsigned char)(regs->tstate >> 24); /* %asi */
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else
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return (unsigned char)(insn >> 5); /* imm_asi */
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} else
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return ASI_P;
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}
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/* 0x400000 = signed, 0 = unsigned */
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static inline int decode_signedness(unsigned int insn)
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{
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return (insn & 0x400000);
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}
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static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
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unsigned int rd, int from_kernel)
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{
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if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
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if (from_kernel != 0)
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__asm__ __volatile__("flushw");
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else
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flushw_user();
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}
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}
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static inline long sign_extend_imm13(long imm)
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{
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return imm << 51 >> 51;
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}
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static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
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{
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unsigned long value;
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if (reg < 16)
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return (!reg ? 0 : regs->u_regs[reg]);
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if (regs->tstate & TSTATE_PRIV) {
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struct reg_window *win;
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win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
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value = win->locals[reg - 16];
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} else if (test_thread_flag(TIF_32BIT)) {
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struct reg_window32 __user *win32;
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win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
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get_user(value, &win32->locals[reg - 16]);
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} else {
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struct reg_window __user *win;
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win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
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get_user(value, &win->locals[reg - 16]);
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}
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return value;
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}
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static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
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{
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if (reg < 16)
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return ®s->u_regs[reg];
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if (regs->tstate & TSTATE_PRIV) {
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struct reg_window *win;
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win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
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return &win->locals[reg - 16];
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} else if (test_thread_flag(TIF_32BIT)) {
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struct reg_window32 *win32;
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win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
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return (unsigned long *)&win32->locals[reg - 16];
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} else {
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struct reg_window *win;
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win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
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return &win->locals[reg - 16];
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}
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}
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unsigned long compute_effective_address(struct pt_regs *regs,
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unsigned int insn, unsigned int rd)
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{
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unsigned int rs1 = (insn >> 14) & 0x1f;
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unsigned int rs2 = insn & 0x1f;
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int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
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if (insn & 0x2000) {
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maybe_flush_windows(rs1, 0, rd, from_kernel);
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return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
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} else {
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maybe_flush_windows(rs1, rs2, rd, from_kernel);
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return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
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}
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}
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/* This is just to make gcc think die_if_kernel does return... */
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static void __attribute_used__ unaligned_panic(char *str, struct pt_regs *regs)
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{
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die_if_kernel(str, regs);
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}
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#define do_integer_load(dest_reg, size, saddr, is_signed, asi, errh) ({ \
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__asm__ __volatile__ ( \
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"wr %4, 0, %%asi\n\t" \
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"cmp %1, 8\n\t" \
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"bge,pn %%icc, 9f\n\t" \
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" cmp %1, 4\n\t" \
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"be,pt %%icc, 6f\n" \
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"4:\t" " lduba [%2] %%asi, %%l1\n" \
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"5:\t" "lduba [%2 + 1] %%asi, %%l2\n\t" \
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"sll %%l1, 8, %%l1\n\t" \
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"brz,pt %3, 3f\n\t" \
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" add %%l1, %%l2, %%l1\n\t" \
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"sllx %%l1, 48, %%l1\n\t" \
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"srax %%l1, 48, %%l1\n" \
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"3:\t" "ba,pt %%xcc, 0f\n\t" \
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" stx %%l1, [%0]\n" \
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"6:\t" "lduba [%2 + 1] %%asi, %%l2\n\t" \
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"sll %%l1, 24, %%l1\n" \
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"7:\t" "lduba [%2 + 2] %%asi, %%g7\n\t" \
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"sll %%l2, 16, %%l2\n" \
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"8:\t" "lduba [%2 + 3] %%asi, %%g1\n\t" \
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"sll %%g7, 8, %%g7\n\t" \
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"or %%l1, %%l2, %%l1\n\t" \
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"or %%g7, %%g1, %%g7\n\t" \
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"or %%l1, %%g7, %%l1\n\t" \
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"brnz,a,pt %3, 3f\n\t" \
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" sra %%l1, 0, %%l1\n" \
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"3:\t" "ba,pt %%xcc, 0f\n\t" \
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" stx %%l1, [%0]\n" \
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"9:\t" "lduba [%2] %%asi, %%l1\n" \
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"10:\t" "lduba [%2 + 1] %%asi, %%l2\n\t" \
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"sllx %%l1, 56, %%l1\n" \
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"11:\t" "lduba [%2 + 2] %%asi, %%g7\n\t" \
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"sllx %%l2, 48, %%l2\n" \
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"12:\t" "lduba [%2 + 3] %%asi, %%g1\n\t" \
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"sllx %%g7, 40, %%g7\n\t" \
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"sllx %%g1, 32, %%g1\n\t" \
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"or %%l1, %%l2, %%l1\n\t" \
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"or %%g7, %%g1, %%g7\n" \
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"13:\t" "lduba [%2 + 4] %%asi, %%l2\n\t" \
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"or %%l1, %%g7, %%g7\n" \
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"14:\t" "lduba [%2 + 5] %%asi, %%g1\n\t" \
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"sllx %%l2, 24, %%l2\n" \
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"15:\t" "lduba [%2 + 6] %%asi, %%l1\n\t" \
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"sllx %%g1, 16, %%g1\n\t" \
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"or %%g7, %%l2, %%g7\n" \
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"16:\t" "lduba [%2 + 7] %%asi, %%l2\n\t" \
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"sllx %%l1, 8, %%l1\n\t" \
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"or %%g7, %%g1, %%g7\n\t" \
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"or %%l1, %%l2, %%l1\n\t" \
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"or %%g7, %%l1, %%g7\n\t" \
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"cmp %1, 8\n\t" \
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"be,a,pt %%icc, 0f\n\t" \
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" stx %%g7, [%0]\n\t" \
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"srlx %%g7, 32, %%l1\n\t" \
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"sra %%g7, 0, %%g7\n\t" \
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"stx %%l1, [%0]\n\t" \
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"stx %%g7, [%0 + 8]\n" \
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"0:\n\t" \
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"wr %%g0, %5, %%asi\n\n\t" \
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".section __ex_table\n\t" \
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".word 4b, " #errh "\n\t" \
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".word 5b, " #errh "\n\t" \
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".word 6b, " #errh "\n\t" \
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".word 7b, " #errh "\n\t" \
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".word 8b, " #errh "\n\t" \
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".word 9b, " #errh "\n\t" \
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".word 10b, " #errh "\n\t" \
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".word 11b, " #errh "\n\t" \
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".word 12b, " #errh "\n\t" \
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".word 13b, " #errh "\n\t" \
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".word 14b, " #errh "\n\t" \
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".word 15b, " #errh "\n\t" \
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".word 16b, " #errh "\n\n\t" \
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".previous\n\t" \
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: : "r" (dest_reg), "r" (size), "r" (saddr), "r" (is_signed), \
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"r" (asi), "i" (ASI_AIUS) \
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: "l1", "l2", "g7", "g1", "cc"); \
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})
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#define store_common(dst_addr, size, src_val, asi, errh) ({ \
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__asm__ __volatile__ ( \
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"wr %3, 0, %%asi\n\t" \
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"ldx [%2], %%l1\n" \
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"cmp %1, 2\n\t" \
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"be,pn %%icc, 2f\n\t" \
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" cmp %1, 4\n\t" \
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"be,pt %%icc, 1f\n\t" \
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" srlx %%l1, 24, %%l2\n\t" \
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"srlx %%l1, 56, %%g1\n\t" \
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"srlx %%l1, 48, %%g7\n" \
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"4:\t" "stba %%g1, [%0] %%asi\n\t" \
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"srlx %%l1, 40, %%g1\n" \
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"5:\t" "stba %%g7, [%0 + 1] %%asi\n\t" \
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"srlx %%l1, 32, %%g7\n" \
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"6:\t" "stba %%g1, [%0 + 2] %%asi\n" \
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"7:\t" "stba %%g7, [%0 + 3] %%asi\n\t" \
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"srlx %%l1, 16, %%g1\n" \
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"8:\t" "stba %%l2, [%0 + 4] %%asi\n\t" \
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"srlx %%l1, 8, %%g7\n" \
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"9:\t" "stba %%g1, [%0 + 5] %%asi\n" \
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"10:\t" "stba %%g7, [%0 + 6] %%asi\n\t" \
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"ba,pt %%xcc, 0f\n" \
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"11:\t" " stba %%l1, [%0 + 7] %%asi\n" \
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"1:\t" "srl %%l1, 16, %%g7\n" \
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"12:\t" "stba %%l2, [%0] %%asi\n\t" \
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"srl %%l1, 8, %%l2\n" \
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"13:\t" "stba %%g7, [%0 + 1] %%asi\n" \
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"14:\t" "stba %%l2, [%0 + 2] %%asi\n\t" \
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"ba,pt %%xcc, 0f\n" \
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"15:\t" " stba %%l1, [%0 + 3] %%asi\n" \
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"2:\t" "srl %%l1, 8, %%l2\n" \
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"16:\t" "stba %%l2, [%0] %%asi\n" \
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"17:\t" "stba %%l1, [%0 + 1] %%asi\n" \
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"0:\n\t" \
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"wr %%g0, %4, %%asi\n\n\t" \
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".section __ex_table\n\t" \
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".word 4b, " #errh "\n\t" \
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".word 5b, " #errh "\n\t" \
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".word 6b, " #errh "\n\t" \
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".word 7b, " #errh "\n\t" \
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".word 8b, " #errh "\n\t" \
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".word 9b, " #errh "\n\t" \
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".word 10b, " #errh "\n\t" \
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".word 11b, " #errh "\n\t" \
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".word 12b, " #errh "\n\t" \
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".word 13b, " #errh "\n\t" \
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".word 14b, " #errh "\n\t" \
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".word 15b, " #errh "\n\t" \
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".word 16b, " #errh "\n\t" \
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".word 17b, " #errh "\n\n\t" \
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".previous\n\t" \
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: : "r" (dst_addr), "r" (size), "r" (src_val), "r" (asi), "i" (ASI_AIUS)\
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: "l1", "l2", "g7", "g1", "cc"); \
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})
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#define do_integer_store(reg_num, size, dst_addr, regs, asi, errh) ({ \
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unsigned long zero = 0; \
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unsigned long *src_val = &zero; \
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\
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if (size == 16) { \
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size = 8; \
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zero = (((long)(reg_num ? \
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(unsigned)fetch_reg(reg_num, regs) : 0)) << 32) | \
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(unsigned)fetch_reg(reg_num + 1, regs); \
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} else if (reg_num) src_val = fetch_reg_addr(reg_num, regs); \
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store_common(dst_addr, size, src_val, asi, errh); \
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})
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extern void smp_capture(void);
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extern void smp_release(void);
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#define do_atomic(srcdest_reg, mem, errh) ({ \
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unsigned long flags, tmp; \
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\
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smp_capture(); \
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local_irq_save(flags); \
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tmp = *srcdest_reg; \
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do_integer_load(srcdest_reg, 4, mem, 0, errh); \
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store_common(mem, 4, &tmp, errh); \
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local_irq_restore(flags); \
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smp_release(); \
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})
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static inline void advance(struct pt_regs *regs)
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{
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regs->tpc = regs->tnpc;
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regs->tnpc += 4;
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if (test_thread_flag(TIF_32BIT)) {
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regs->tpc &= 0xffffffff;
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regs->tnpc &= 0xffffffff;
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}
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}
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static inline int floating_point_load_or_store_p(unsigned int insn)
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{
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return (insn >> 24) & 1;
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}
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static inline int ok_for_kernel(unsigned int insn)
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{
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return !floating_point_load_or_store_p(insn);
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}
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void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn) __asm__ ("kernel_mna_trap_fault");
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void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
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{
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unsigned long g2 = regs->u_regs [UREG_G2];
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unsigned long fixup = search_extables_range(regs->tpc, &g2);
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if (!fixup) {
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unsigned long address = compute_effective_address(regs, insn, ((insn >> 25) & 0x1f));
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if (address < PAGE_SIZE) {
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printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference in mna handler");
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} else
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printk(KERN_ALERT "Unable to handle kernel paging request in mna handler");
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printk(KERN_ALERT " at virtual address %016lx\n",address);
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printk(KERN_ALERT "current->{mm,active_mm}->context = %016lx\n",
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(current->mm ? CTX_HWBITS(current->mm->context) :
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CTX_HWBITS(current->active_mm->context)));
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printk(KERN_ALERT "current->{mm,active_mm}->pgd = %016lx\n",
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(current->mm ? (unsigned long) current->mm->pgd :
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(unsigned long) current->active_mm->pgd));
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die_if_kernel("Oops", regs);
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/* Not reached */
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}
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regs->tpc = fixup;
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regs->tnpc = regs->tpc + 4;
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regs->u_regs [UREG_G2] = g2;
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regs->tstate &= ~TSTATE_ASI;
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regs->tstate |= (ASI_AIUS << 24UL);
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}
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asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, unsigned long sfar, unsigned long sfsr)
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{
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enum direction dir = decode_direction(insn);
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int size = decode_access_size(insn);
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if (!ok_for_kernel(insn) || dir == both) {
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printk("Unsupported unaligned load/store trap for kernel at <%016lx>.\n",
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regs->tpc);
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unaligned_panic("Kernel does fpu/atomic unaligned load/store.", regs);
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__asm__ __volatile__ ("\n"
|
|
"kernel_unaligned_trap_fault:\n\t"
|
|
"mov %0, %%o0\n\t"
|
|
"call kernel_mna_trap_fault\n\t"
|
|
" mov %1, %%o1\n\t"
|
|
:
|
|
: "r" (regs), "r" (insn)
|
|
: "o0", "o1", "o2", "o3", "o4", "o5", "o7",
|
|
"g1", "g2", "g3", "g4", "g7", "cc");
|
|
} else {
|
|
unsigned long addr = compute_effective_address(regs, insn, ((insn >> 25) & 0x1f));
|
|
|
|
#ifdef DEBUG_MNA
|
|
printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] retpc[%016lx]\n",
|
|
regs->tpc, dirstrings[dir], addr, size, regs->u_regs[UREG_RETPC]);
|
|
#endif
|
|
switch (dir) {
|
|
case load:
|
|
do_integer_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
|
size, (unsigned long *) addr,
|
|
decode_signedness(insn), decode_asi(insn, regs),
|
|
kernel_unaligned_trap_fault);
|
|
break;
|
|
|
|
case store:
|
|
do_integer_store(((insn>>25)&0x1f), size,
|
|
(unsigned long *) addr, regs,
|
|
decode_asi(insn, regs),
|
|
kernel_unaligned_trap_fault);
|
|
break;
|
|
#if 0 /* unsupported */
|
|
case both:
|
|
do_atomic(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
|
(unsigned long *) addr,
|
|
kernel_unaligned_trap_fault);
|
|
break;
|
|
#endif
|
|
default:
|
|
panic("Impossible kernel unaligned trap.");
|
|
/* Not reached... */
|
|
}
|
|
advance(regs);
|
|
}
|
|
}
|
|
|
|
static char popc_helper[] = {
|
|
0, 1, 1, 2, 1, 2, 2, 3,
|
|
1, 2, 2, 3, 2, 3, 3, 4,
|
|
};
|
|
|
|
int handle_popc(u32 insn, struct pt_regs *regs)
|
|
{
|
|
u64 value;
|
|
int ret, i, rd = ((insn >> 25) & 0x1f);
|
|
int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
|
|
|
|
if (insn & 0x2000) {
|
|
maybe_flush_windows(0, 0, rd, from_kernel);
|
|
value = sign_extend_imm13(insn);
|
|
} else {
|
|
maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
|
|
value = fetch_reg(insn & 0x1f, regs);
|
|
}
|
|
for (ret = 0, i = 0; i < 16; i++) {
|
|
ret += popc_helper[value & 0xf];
|
|
value >>= 4;
|
|
}
|
|
if (rd < 16) {
|
|
if (rd)
|
|
regs->u_regs[rd] = ret;
|
|
} else {
|
|
if (test_thread_flag(TIF_32BIT)) {
|
|
struct reg_window32 __user *win32;
|
|
win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
|
|
put_user(ret, &win32->locals[rd - 16]);
|
|
} else {
|
|
struct reg_window __user *win;
|
|
win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
|
|
put_user(ret, &win->locals[rd - 16]);
|
|
}
|
|
}
|
|
advance(regs);
|
|
return 1;
|
|
}
|
|
|
|
extern void do_fpother(struct pt_regs *regs);
|
|
extern void do_privact(struct pt_regs *regs);
|
|
extern void data_access_exception(struct pt_regs *regs,
|
|
unsigned long sfsr,
|
|
unsigned long sfar);
|
|
|
|
int handle_ldf_stq(u32 insn, struct pt_regs *regs)
|
|
{
|
|
unsigned long addr = compute_effective_address(regs, insn, 0);
|
|
int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
|
|
struct fpustate *f = FPUSTATE;
|
|
int asi = decode_asi(insn, regs);
|
|
int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
|
|
|
|
save_and_clear_fpu();
|
|
current_thread_info()->xfsr[0] &= ~0x1c000;
|
|
if (freg & 3) {
|
|
current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
|
|
do_fpother(regs);
|
|
return 0;
|
|
}
|
|
if (insn & 0x200000) {
|
|
/* STQ */
|
|
u64 first = 0, second = 0;
|
|
|
|
if (current_thread_info()->fpsaved[0] & flag) {
|
|
first = *(u64 *)&f->regs[freg];
|
|
second = *(u64 *)&f->regs[freg+2];
|
|
}
|
|
if (asi < 0x80) {
|
|
do_privact(regs);
|
|
return 1;
|
|
}
|
|
switch (asi) {
|
|
case ASI_P:
|
|
case ASI_S: break;
|
|
case ASI_PL:
|
|
case ASI_SL:
|
|
{
|
|
/* Need to convert endians */
|
|
u64 tmp = __swab64p(&first);
|
|
|
|
first = __swab64p(&second);
|
|
second = tmp;
|
|
break;
|
|
}
|
|
default:
|
|
data_access_exception(regs, 0, addr);
|
|
return 1;
|
|
}
|
|
if (put_user (first >> 32, (u32 __user *)addr) ||
|
|
__put_user ((u32)first, (u32 __user *)(addr + 4)) ||
|
|
__put_user (second >> 32, (u32 __user *)(addr + 8)) ||
|
|
__put_user ((u32)second, (u32 __user *)(addr + 12))) {
|
|
data_access_exception(regs, 0, addr);
|
|
return 1;
|
|
}
|
|
} else {
|
|
/* LDF, LDDF, LDQF */
|
|
u32 data[4] __attribute__ ((aligned(8)));
|
|
int size, i;
|
|
int err;
|
|
|
|
if (asi < 0x80) {
|
|
do_privact(regs);
|
|
return 1;
|
|
} else if (asi > ASI_SNFL) {
|
|
data_access_exception(regs, 0, addr);
|
|
return 1;
|
|
}
|
|
switch (insn & 0x180000) {
|
|
case 0x000000: size = 1; break;
|
|
case 0x100000: size = 4; break;
|
|
default: size = 2; break;
|
|
}
|
|
for (i = 0; i < size; i++)
|
|
data[i] = 0;
|
|
|
|
err = get_user (data[0], (u32 __user *) addr);
|
|
if (!err) {
|
|
for (i = 1; i < size; i++)
|
|
err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
|
|
}
|
|
if (err && !(asi & 0x2 /* NF */)) {
|
|
data_access_exception(regs, 0, addr);
|
|
return 1;
|
|
}
|
|
if (asi & 0x8) /* Little */ {
|
|
u64 tmp;
|
|
|
|
switch (size) {
|
|
case 1: data[0] = le32_to_cpup(data + 0); break;
|
|
default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
|
|
break;
|
|
case 4: tmp = le64_to_cpup((u64 *)(data + 0));
|
|
*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
|
|
*(u64 *)(data + 2) = tmp;
|
|
break;
|
|
}
|
|
}
|
|
if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
|
|
current_thread_info()->fpsaved[0] = FPRS_FEF;
|
|
current_thread_info()->gsr[0] = 0;
|
|
}
|
|
if (!(current_thread_info()->fpsaved[0] & flag)) {
|
|
if (freg < 32)
|
|
memset(f->regs, 0, 32*sizeof(u32));
|
|
else
|
|
memset(f->regs+32, 0, 32*sizeof(u32));
|
|
}
|
|
memcpy(f->regs + freg, data, size * 4);
|
|
current_thread_info()->fpsaved[0] |= flag;
|
|
}
|
|
advance(regs);
|
|
return 1;
|
|
}
|
|
|
|
void handle_ld_nf(u32 insn, struct pt_regs *regs)
|
|
{
|
|
int rd = ((insn >> 25) & 0x1f);
|
|
int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
|
|
unsigned long *reg;
|
|
|
|
maybe_flush_windows(0, 0, rd, from_kernel);
|
|
reg = fetch_reg_addr(rd, regs);
|
|
if (from_kernel || rd < 16) {
|
|
reg[0] = 0;
|
|
if ((insn & 0x780000) == 0x180000)
|
|
reg[1] = 0;
|
|
} else if (test_thread_flag(TIF_32BIT)) {
|
|
put_user(0, (int __user *) reg);
|
|
if ((insn & 0x780000) == 0x180000)
|
|
put_user(0, ((int __user *) reg) + 1);
|
|
} else {
|
|
put_user(0, (unsigned long __user *) reg);
|
|
if ((insn & 0x780000) == 0x180000)
|
|
put_user(0, (unsigned long __user *) reg + 1);
|
|
}
|
|
advance(regs);
|
|
}
|
|
|
|
void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
|
|
{
|
|
unsigned long pc = regs->tpc;
|
|
unsigned long tstate = regs->tstate;
|
|
u32 insn;
|
|
u32 first, second;
|
|
u64 value;
|
|
u8 asi, freg;
|
|
int flag;
|
|
struct fpustate *f = FPUSTATE;
|
|
|
|
if (tstate & TSTATE_PRIV)
|
|
die_if_kernel("lddfmna from kernel", regs);
|
|
if (test_thread_flag(TIF_32BIT))
|
|
pc = (u32)pc;
|
|
if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
|
|
asi = sfsr >> 16;
|
|
if ((asi > ASI_SNFL) ||
|
|
(asi < ASI_P))
|
|
goto daex;
|
|
if (get_user(first, (u32 __user *)sfar) ||
|
|
get_user(second, (u32 __user *)(sfar + 4))) {
|
|
if (asi & 0x2) /* NF */ {
|
|
first = 0; second = 0;
|
|
} else
|
|
goto daex;
|
|
}
|
|
save_and_clear_fpu();
|
|
freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
|
|
value = (((u64)first) << 32) | second;
|
|
if (asi & 0x8) /* Little */
|
|
value = __swab64p(&value);
|
|
flag = (freg < 32) ? FPRS_DL : FPRS_DU;
|
|
if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
|
|
current_thread_info()->fpsaved[0] = FPRS_FEF;
|
|
current_thread_info()->gsr[0] = 0;
|
|
}
|
|
if (!(current_thread_info()->fpsaved[0] & flag)) {
|
|
if (freg < 32)
|
|
memset(f->regs, 0, 32*sizeof(u32));
|
|
else
|
|
memset(f->regs+32, 0, 32*sizeof(u32));
|
|
}
|
|
*(u64 *)(f->regs + freg) = value;
|
|
current_thread_info()->fpsaved[0] |= flag;
|
|
} else {
|
|
daex: data_access_exception(regs, sfsr, sfar);
|
|
return;
|
|
}
|
|
advance(regs);
|
|
return;
|
|
}
|
|
|
|
void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
|
|
{
|
|
unsigned long pc = regs->tpc;
|
|
unsigned long tstate = regs->tstate;
|
|
u32 insn;
|
|
u64 value;
|
|
u8 asi, freg;
|
|
int flag;
|
|
struct fpustate *f = FPUSTATE;
|
|
|
|
if (tstate & TSTATE_PRIV)
|
|
die_if_kernel("stdfmna from kernel", regs);
|
|
if (test_thread_flag(TIF_32BIT))
|
|
pc = (u32)pc;
|
|
if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
|
|
freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
|
|
asi = sfsr >> 16;
|
|
value = 0;
|
|
flag = (freg < 32) ? FPRS_DL : FPRS_DU;
|
|
if ((asi > ASI_SNFL) ||
|
|
(asi < ASI_P))
|
|
goto daex;
|
|
save_and_clear_fpu();
|
|
if (current_thread_info()->fpsaved[0] & flag)
|
|
value = *(u64 *)&f->regs[freg];
|
|
switch (asi) {
|
|
case ASI_P:
|
|
case ASI_S: break;
|
|
case ASI_PL:
|
|
case ASI_SL:
|
|
value = __swab64p(&value); break;
|
|
default: goto daex;
|
|
}
|
|
if (put_user (value >> 32, (u32 __user *) sfar) ||
|
|
__put_user ((u32)value, (u32 __user *)(sfar + 4)))
|
|
goto daex;
|
|
} else {
|
|
daex: data_access_exception(regs, sfsr, sfar);
|
|
return;
|
|
}
|
|
advance(regs);
|
|
return;
|
|
}
|