Wei Yongjun 6f877e79a7 clk: tegra: dfll: Use builtin_platform_driver to simplify the code ... Use the builtin_platform_driver() macro to make the code simpler. Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2016-11-10 14:08:46 -08:00
..
clk-audio-sync.c
clk-dfll.c	clk: tegra: dfll: Reference CVB table instead of copying data	2016-04-28 12:41:53 +02:00
clk-dfll.h	clk: tegra: dfll: Properly clean up on failure and removal	2016-04-28 12:41:54 +02:00
clk-divider.c
clk-emc.c
clk-id.h	clk: tegra: Squash sor1 safe/brick/src into a single mux	2016-06-17 17:24:09 +02:00
clk-periph-fixed.c	clk: tegra: Add fixed factor peripheral clock type	2016-04-28 12:41:47 +02:00
clk-periph-gate.c	clk: tegra: Constify peripheral clock registers	2016-04-28 12:41:45 +02:00
clk-periph.c	clk: tegra: Constify peripheral clock registers	2016-04-28 12:41:45 +02:00
clk-pll-out.c
clk-pll.c	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
clk-super.c
clk-tegra20.c	treewide: Fix typos in printk	2016-04-28 10:52:28 +02:00
clk-tegra30.c	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
clk-tegra114.c	clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2	2016-08-24 10:54:17 -07:00
clk-tegra124-dfll-fcpu.c	clk: tegra: dfll: Use builtin_platform_driver to simplify the code	2016-11-10 14:08:46 -08:00
clk-tegra124.c	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
clk-tegra210.c	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
clk-tegra-audio.c
clk-tegra-fixed.c	clk: tegra: Remove trailing blank line	2016-04-28 12:41:45 +02:00
clk-tegra-periph.c	clk: tegra: Mark timer clock as critical	2016-06-22 13:46:52 +02:00
clk-tegra-pmc.c
clk-tegra-super-gen4.c
clk.c	clk: tegra: Changes for v4.7-rc1	2016-05-02 16:53:02 -07:00
clk.h	clk: tegra: Initialize UTMI PLL when enabling PLLU	2016-06-30 17:43:17 +02:00
cvb.c	clk: tegra: dfll: improve function-level documentation	2016-11-01 17:38:50 -07:00
cvb.h	clk: tegra: dfll: Properly clean up on failure and removal	2016-04-28 12:41:54 +02:00
Kconfig
Makefile	clk: tegra: Add fixed factor peripheral clock type	2016-04-28 12:41:47 +02:00