forked from luck/tmp_suning_uos_patched
4d89ecaae9
Add IORESOURCE_IRQ_HIGHLEVEL irq flag to dm9000 driver platform data in board mach-real6410. Signed-off-by: Darius Augulis <augulis.darius@gmail.com> [kgene.kim@samsung.com: minor title fix] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
153 lines
3.8 KiB
C
153 lines
3.8 KiB
C
/* linux/arch/arm/mach-s3c64xx/mach-real6410.c
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*
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* Copyright 2010 Darius Augulis <augulis.darius@gmail.com>
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* Copyright 2008 Openmoko, Inc.
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* Copyright 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/init.h>
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#include <linux/dm9000.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <mach/map.h>
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#include <mach/s3c6410.h>
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#include <mach/regs-srom.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/regs-serial.h>
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#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
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#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
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#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
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static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[3] = {
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.hwport = 3,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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};
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/* DM9000AEP 10/100 ethernet controller */
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static struct resource real6410_dm9k_resource[] = {
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[0] = {
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.start = S3C64XX_PA_XM0CSN1,
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.end = S3C64XX_PA_XM0CSN1 + 1,
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.flags = IORESOURCE_MEM
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},
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[1] = {
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.start = S3C64XX_PA_XM0CSN1 + 4,
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.end = S3C64XX_PA_XM0CSN1 + 5,
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.flags = IORESOURCE_MEM
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},
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[2] = {
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.start = S3C_EINT(7),
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.end = S3C_EINT(7),
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL
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}
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};
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static struct dm9000_plat_data real6410_dm9k_pdata = {
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.flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM),
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};
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static struct platform_device real6410_device_eth = {
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.name = "dm9000",
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.id = -1,
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.num_resources = ARRAY_SIZE(real6410_dm9k_resource),
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.resource = real6410_dm9k_resource,
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.dev = {
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.platform_data = &real6410_dm9k_pdata,
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},
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};
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static struct platform_device *real6410_devices[] __initdata = {
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&real6410_device_eth,
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&s3c_device_hsmmc0,
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&s3c_device_hsmmc1,
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};
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static void __init real6410_map_io(void)
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{
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s3c64xx_init_io(NULL, 0);
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s3c24xx_init_clocks(12000000);
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s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs));
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}
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static void __init real6410_machine_init(void)
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{
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u32 cs1;
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/* configure nCS1 width to 16 bits */
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cs1 = __raw_readl(S3C64XX_SROM_BW) &
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~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
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cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
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(1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
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(1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
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S3C64XX_SROM_BW__NCS1__SHIFT;
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__raw_writel(cs1, S3C64XX_SROM_BW);
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/* set timing for nCS1 suitable for ethernet chip */
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__raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
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(6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
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(4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
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(1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
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(13 << S3C64XX_SROM_BCX__TACC__SHIFT) |
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(4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
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(0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
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platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices));
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}
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MACHINE_START(REAL6410, "REAL6410")
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/* Maintainer: Darius Augulis <augulis.darius@gmail.com> */
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.phys_io = S3C_PA_UART & 0xfff00000,
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.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
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.boot_params = S3C64XX_PA_SDRAM + 0x100,
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.init_irq = s3c6410_init_irq,
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.map_io = real6410_map_io,
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.init_machine = real6410_machine_init,
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.timer = &s3c24xx_timer,
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MACHINE_END
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