forked from luck/tmp_suning_uos_patched
8d30c14cab
This patch reworks the way we do I and D cache coherency on PowerPC. The "old" way was split in 3 different parts depending on the processor type: - Hash with per-page exec support (64-bit and >= POWER4 only) does it at hashing time, by preventing exec on unclean pages and cleaning pages on exec faults. - Everything without per-page exec support (32-bit hash, 8xx, and 64-bit < POWER4) does it for all page going to user space in update_mmu_cache(). - Embedded with per-page exec support does it from do_page_fault() on exec faults, in a way similar to what the hash code does. That leads to confusion, and bugs. For example, the method using update_mmu_cache() is racy on SMP where another processor can see the new PTE and hash it in before we have cleaned the cache, and then blow trying to execute. This is hard to hit but I think it has bitten us in the past. Also, it's inefficient for embedded where we always end up having to do at least one more page fault. This reworks the whole thing by moving the cache sync into two main call sites, though we keep different behaviours depending on the HW capability. The call sites are set_pte_at() which is now made out of line, and ptep_set_access_flags() which joins the former in pgtable.c The base idea for Embedded with per-page exec support, is that we now do the flush at set_pte_at() time when coming from an exec fault, which allows us to avoid the double fault problem completely (we can even improve the situation more by implementing TLB preload in update_mmu_cache() but that's for later). If for some reason we didn't do it there and we try to execute, we'll hit the page fault, which will do a minor fault, which will hit ptep_set_access_flags() to do things like update _PAGE_ACCESSED or _PAGE_DIRTY if needed, we just make this guys also perform the I/D cache sync for exec faults now. This second path is the catch all for things that weren't cleaned at set_pte_at() time. For cpus without per-pag exec support, we always do the sync at set_pte_at(), thus guaranteeing that when the PTE is visible to other processors, the cache is clean. For the 64-bit hash with per-page exec support case, we keep the old mechanism for now. I'll look into changing it later, once I've reworked a bit how we use _PAGE_EXEC. This is also a first step for adding _PAGE_EXEC support for embedded platforms Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
497 lines
13 KiB
C
497 lines
13 KiB
C
/*
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* PowerPC version
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* Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
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*
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* Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
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* and Cort Dougan (PReP) (cort@cs.nmt.edu)
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* Copyright (C) 1996 Paul Mackerras
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* PPC44x/36-bit changes by Matt Porter (mporter@mvista.com)
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*
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* Derived from "arch/i386/mm/init.c"
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* Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/init.h>
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#include <linux/bootmem.h>
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#include <linux/highmem.h>
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#include <linux/initrd.h>
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#include <linux/pagemap.h>
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#include <linux/suspend.h>
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#include <linux/lmb.h>
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#include <asm/pgalloc.h>
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#include <asm/prom.h>
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#include <asm/io.h>
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#include <asm/mmu_context.h>
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#include <asm/pgtable.h>
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#include <asm/mmu.h>
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#include <asm/smp.h>
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#include <asm/machdep.h>
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#include <asm/btext.h>
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#include <asm/tlb.h>
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#include <asm/sections.h>
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#include <asm/sparsemem.h>
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#include <asm/vdso.h>
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#include <asm/fixmap.h>
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#include "mmu_decl.h"
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#ifndef CPU_FTR_COHERENT_ICACHE
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#define CPU_FTR_COHERENT_ICACHE 0 /* XXX for now */
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#define CPU_FTR_NOEXECUTE 0
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#endif
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int init_bootmem_done;
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int mem_init_done;
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unsigned long memory_limit;
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#ifdef CONFIG_HIGHMEM
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pte_t *kmap_pte;
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pgprot_t kmap_prot;
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EXPORT_SYMBOL(kmap_prot);
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EXPORT_SYMBOL(kmap_pte);
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static inline pte_t *virt_to_kpte(unsigned long vaddr)
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{
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return pte_offset_kernel(pmd_offset(pud_offset(pgd_offset_k(vaddr),
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vaddr), vaddr), vaddr);
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}
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#endif
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int page_is_ram(unsigned long pfn)
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{
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#ifndef CONFIG_PPC64 /* XXX for now */
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return pfn < max_pfn;
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#else
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unsigned long paddr = (pfn << PAGE_SHIFT);
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int i;
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for (i=0; i < lmb.memory.cnt; i++) {
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unsigned long base;
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base = lmb.memory.region[i].base;
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if ((paddr >= base) &&
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(paddr < (base + lmb.memory.region[i].size))) {
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return 1;
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}
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}
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return 0;
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#endif
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}
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pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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unsigned long size, pgprot_t vma_prot)
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{
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if (ppc_md.phys_mem_access_prot)
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return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
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if (!page_is_ram(pfn))
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vma_prot = pgprot_noncached(vma_prot);
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return vma_prot;
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}
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EXPORT_SYMBOL(phys_mem_access_prot);
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#ifdef CONFIG_MEMORY_HOTPLUG
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#ifdef CONFIG_NUMA
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int memory_add_physaddr_to_nid(u64 start)
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{
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return hot_add_scn_to_nid(start);
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}
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#endif
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int arch_add_memory(int nid, u64 start, u64 size)
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{
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struct pglist_data *pgdata;
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struct zone *zone;
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unsigned long start_pfn = start >> PAGE_SHIFT;
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unsigned long nr_pages = size >> PAGE_SHIFT;
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pgdata = NODE_DATA(nid);
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start = (unsigned long)__va(start);
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create_section_mapping(start, start + size);
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/* this should work for most non-highmem platforms */
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zone = pgdata->node_zones;
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return __add_pages(nid, zone, start_pfn, nr_pages);
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}
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#endif /* CONFIG_MEMORY_HOTPLUG */
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/*
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* walk_memory_resource() needs to make sure there is no holes in a given
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* memory range. PPC64 does not maintain the memory layout in /proc/iomem.
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* Instead it maintains it in lmb.memory structures. Walk through the
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* memory regions, find holes and callback for contiguous regions.
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*/
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int
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walk_memory_resource(unsigned long start_pfn, unsigned long nr_pages, void *arg,
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int (*func)(unsigned long, unsigned long, void *))
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{
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struct lmb_property res;
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unsigned long pfn, len;
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u64 end;
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int ret = -1;
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res.base = (u64) start_pfn << PAGE_SHIFT;
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res.size = (u64) nr_pages << PAGE_SHIFT;
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end = res.base + res.size - 1;
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while ((res.base < end) && (lmb_find(&res) >= 0)) {
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pfn = (unsigned long)(res.base >> PAGE_SHIFT);
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len = (unsigned long)(res.size >> PAGE_SHIFT);
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ret = (*func)(pfn, len, arg);
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if (ret)
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break;
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res.base += (res.size + 1);
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res.size = (end - res.base + 1);
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}
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return ret;
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}
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EXPORT_SYMBOL_GPL(walk_memory_resource);
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/*
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* Initialize the bootmem system and give it all the memory we
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* have available. If we are using highmem, we only put the
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* lowmem into the bootmem system.
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*/
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#ifndef CONFIG_NEED_MULTIPLE_NODES
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void __init do_init_bootmem(void)
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{
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unsigned long i;
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unsigned long start, bootmap_pages;
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unsigned long total_pages;
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int boot_mapsize;
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max_low_pfn = max_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
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total_pages = (lmb_end_of_DRAM() - memstart_addr) >> PAGE_SHIFT;
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#ifdef CONFIG_HIGHMEM
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total_pages = total_lowmem >> PAGE_SHIFT;
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max_low_pfn = lowmem_end_addr >> PAGE_SHIFT;
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#endif
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/*
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* Find an area to use for the bootmem bitmap. Calculate the size of
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* bitmap required as (Total Memory) / PAGE_SIZE / BITS_PER_BYTE.
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* Add 1 additional page in case the address isn't page-aligned.
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*/
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bootmap_pages = bootmem_bootmap_pages(total_pages);
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start = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
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min_low_pfn = MEMORY_START >> PAGE_SHIFT;
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boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn);
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/* Add active regions with valid PFNs */
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for (i = 0; i < lmb.memory.cnt; i++) {
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unsigned long start_pfn, end_pfn;
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start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
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end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
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add_active_range(0, start_pfn, end_pfn);
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}
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/* Add all physical memory to the bootmem map, mark each area
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* present.
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*/
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#ifdef CONFIG_HIGHMEM
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free_bootmem_with_active_regions(0, lowmem_end_addr >> PAGE_SHIFT);
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/* reserve the sections we're already using */
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for (i = 0; i < lmb.reserved.cnt; i++) {
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unsigned long addr = lmb.reserved.region[i].base +
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lmb_size_bytes(&lmb.reserved, i) - 1;
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if (addr < lowmem_end_addr)
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reserve_bootmem(lmb.reserved.region[i].base,
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lmb_size_bytes(&lmb.reserved, i),
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BOOTMEM_DEFAULT);
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else if (lmb.reserved.region[i].base < lowmem_end_addr) {
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unsigned long adjusted_size = lowmem_end_addr -
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lmb.reserved.region[i].base;
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reserve_bootmem(lmb.reserved.region[i].base,
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adjusted_size, BOOTMEM_DEFAULT);
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}
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}
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#else
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free_bootmem_with_active_regions(0, max_pfn);
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/* reserve the sections we're already using */
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for (i = 0; i < lmb.reserved.cnt; i++)
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reserve_bootmem(lmb.reserved.region[i].base,
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lmb_size_bytes(&lmb.reserved, i),
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BOOTMEM_DEFAULT);
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#endif
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/* XXX need to clip this if using highmem? */
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sparse_memory_present_with_active_regions(0);
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init_bootmem_done = 1;
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}
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/* mark pages that don't exist as nosave */
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static int __init mark_nonram_nosave(void)
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{
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unsigned long lmb_next_region_start_pfn,
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lmb_region_max_pfn;
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int i;
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for (i = 0; i < lmb.memory.cnt - 1; i++) {
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lmb_region_max_pfn =
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(lmb.memory.region[i].base >> PAGE_SHIFT) +
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(lmb.memory.region[i].size >> PAGE_SHIFT);
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lmb_next_region_start_pfn =
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lmb.memory.region[i+1].base >> PAGE_SHIFT;
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if (lmb_region_max_pfn < lmb_next_region_start_pfn)
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register_nosave_region(lmb_region_max_pfn,
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lmb_next_region_start_pfn);
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}
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return 0;
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}
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/*
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* paging_init() sets up the page tables - in fact we've already done this.
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*/
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void __init paging_init(void)
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{
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unsigned long total_ram = lmb_phys_mem_size();
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phys_addr_t top_of_ram = lmb_end_of_DRAM();
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unsigned long max_zone_pfns[MAX_NR_ZONES];
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#ifdef CONFIG_PPC32
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unsigned long v = __fix_to_virt(__end_of_fixed_addresses - 1);
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unsigned long end = __fix_to_virt(FIX_HOLE);
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for (; v < end; v += PAGE_SIZE)
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map_page(v, 0, 0); /* XXX gross */
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#endif
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#ifdef CONFIG_HIGHMEM
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map_page(PKMAP_BASE, 0, 0); /* XXX gross */
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pkmap_page_table = virt_to_kpte(PKMAP_BASE);
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kmap_pte = virt_to_kpte(__fix_to_virt(FIX_KMAP_BEGIN));
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kmap_prot = PAGE_KERNEL;
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#endif /* CONFIG_HIGHMEM */
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printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%lx\n",
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(unsigned long long)top_of_ram, total_ram);
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printk(KERN_DEBUG "Memory hole size: %ldMB\n",
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(long int)((top_of_ram - total_ram) >> 20));
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memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
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#ifdef CONFIG_HIGHMEM
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max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT;
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max_zone_pfns[ZONE_HIGHMEM] = top_of_ram >> PAGE_SHIFT;
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#else
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max_zone_pfns[ZONE_DMA] = top_of_ram >> PAGE_SHIFT;
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#endif
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free_area_init_nodes(max_zone_pfns);
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mark_nonram_nosave();
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}
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#endif /* ! CONFIG_NEED_MULTIPLE_NODES */
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void __init mem_init(void)
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{
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#ifdef CONFIG_NEED_MULTIPLE_NODES
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int nid;
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#endif
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pg_data_t *pgdat;
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unsigned long i;
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struct page *page;
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unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize;
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num_physpages = lmb.memory.size >> PAGE_SHIFT;
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high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
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#ifdef CONFIG_NEED_MULTIPLE_NODES
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for_each_online_node(nid) {
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if (NODE_DATA(nid)->node_spanned_pages != 0) {
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printk("freeing bootmem node %d\n", nid);
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totalram_pages +=
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free_all_bootmem_node(NODE_DATA(nid));
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}
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}
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#else
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max_mapnr = max_pfn;
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totalram_pages += free_all_bootmem();
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#endif
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for_each_online_pgdat(pgdat) {
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for (i = 0; i < pgdat->node_spanned_pages; i++) {
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if (!pfn_valid(pgdat->node_start_pfn + i))
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continue;
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page = pgdat_page_nr(pgdat, i);
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if (PageReserved(page))
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reservedpages++;
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}
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}
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codesize = (unsigned long)&_sdata - (unsigned long)&_stext;
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datasize = (unsigned long)&_edata - (unsigned long)&_sdata;
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initsize = (unsigned long)&__init_end - (unsigned long)&__init_begin;
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bsssize = (unsigned long)&__bss_stop - (unsigned long)&__bss_start;
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#ifdef CONFIG_HIGHMEM
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{
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unsigned long pfn, highmem_mapnr;
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highmem_mapnr = lowmem_end_addr >> PAGE_SHIFT;
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for (pfn = highmem_mapnr; pfn < max_mapnr; ++pfn) {
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struct page *page = pfn_to_page(pfn);
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if (lmb_is_reserved(pfn << PAGE_SHIFT))
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continue;
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ClearPageReserved(page);
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init_page_count(page);
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__free_page(page);
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totalhigh_pages++;
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reservedpages--;
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}
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totalram_pages += totalhigh_pages;
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printk(KERN_DEBUG "High memory: %luk\n",
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totalhigh_pages << (PAGE_SHIFT-10));
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}
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#endif /* CONFIG_HIGHMEM */
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printk(KERN_INFO "Memory: %luk/%luk available (%luk kernel code, "
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"%luk reserved, %luk data, %luk bss, %luk init)\n",
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(unsigned long)nr_free_pages() << (PAGE_SHIFT-10),
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num_physpages << (PAGE_SHIFT-10),
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codesize >> 10,
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reservedpages << (PAGE_SHIFT-10),
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datasize >> 10,
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bsssize >> 10,
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initsize >> 10);
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mem_init_done = 1;
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}
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/*
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* This is called when a page has been modified by the kernel.
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* It just marks the page as not i-cache clean. We do the i-cache
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* flush later when the page is given to a user process, if necessary.
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*/
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void flush_dcache_page(struct page *page)
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{
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if (cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
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return;
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/* avoid an atomic op if possible */
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if (test_bit(PG_arch_1, &page->flags))
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clear_bit(PG_arch_1, &page->flags);
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}
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EXPORT_SYMBOL(flush_dcache_page);
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void flush_dcache_icache_page(struct page *page)
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{
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#ifdef CONFIG_BOOKE
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void *start = kmap_atomic(page, KM_PPC_SYNC_ICACHE);
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__flush_dcache_icache(start);
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kunmap_atomic(start, KM_PPC_SYNC_ICACHE);
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#elif defined(CONFIG_8xx) || defined(CONFIG_PPC64)
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/* On 8xx there is no need to kmap since highmem is not supported */
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__flush_dcache_icache(page_address(page));
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#else
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__flush_dcache_icache_phys(page_to_pfn(page) << PAGE_SHIFT);
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#endif
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}
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void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
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{
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clear_page(page);
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/*
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* We shouldnt have to do this, but some versions of glibc
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* require it (ld.so assumes zero filled pages are icache clean)
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* - Anton
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*/
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flush_dcache_page(pg);
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}
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EXPORT_SYMBOL(clear_user_page);
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void copy_user_page(void *vto, void *vfrom, unsigned long vaddr,
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struct page *pg)
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{
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copy_page(vto, vfrom);
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/*
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* We should be able to use the following optimisation, however
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* there are two problems.
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* Firstly a bug in some versions of binutils meant PLT sections
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* were not marked executable.
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* Secondly the first word in the GOT section is blrl, used
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* to establish the GOT address. Until recently the GOT was
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* not marked executable.
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* - Anton
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*/
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#if 0
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if (!vma->vm_file && ((vma->vm_flags & VM_EXEC) == 0))
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return;
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#endif
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flush_dcache_page(pg);
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}
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|
void flush_icache_user_range(struct vm_area_struct *vma, struct page *page,
|
|
unsigned long addr, int len)
|
|
{
|
|
unsigned long maddr;
|
|
|
|
maddr = (unsigned long) kmap(page) + (addr & ~PAGE_MASK);
|
|
flush_icache_range(maddr, maddr + len);
|
|
kunmap(page);
|
|
}
|
|
EXPORT_SYMBOL(flush_icache_user_range);
|
|
|
|
/*
|
|
* This is called at the end of handling a user page fault, when the
|
|
* fault has been handled by updating a PTE in the linux page tables.
|
|
* We use it to preload an HPTE into the hash table corresponding to
|
|
* the updated linux PTE.
|
|
*
|
|
* This must always be called with the pte lock held.
|
|
*/
|
|
void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
|
|
pte_t pte)
|
|
{
|
|
#ifdef CONFIG_PPC_STD_MMU
|
|
unsigned long access = 0, trap;
|
|
|
|
/* We only want HPTEs for linux PTEs that have _PAGE_ACCESSED set */
|
|
if (!pte_young(pte) || address >= TASK_SIZE)
|
|
return;
|
|
|
|
/* We try to figure out if we are coming from an instruction
|
|
* access fault and pass that down to __hash_page so we avoid
|
|
* double-faulting on execution of fresh text. We have to test
|
|
* for regs NULL since init will get here first thing at boot
|
|
*
|
|
* We also avoid filling the hash if not coming from a fault
|
|
*/
|
|
if (current->thread.regs == NULL)
|
|
return;
|
|
trap = TRAP(current->thread.regs);
|
|
if (trap == 0x400)
|
|
access |= _PAGE_EXEC;
|
|
else if (trap != 0x300)
|
|
return;
|
|
hash_preload(vma->vm_mm, address, access, trap);
|
|
#endif /* CONFIG_PPC_STD_MMU */
|
|
}
|