forked from luck/tmp_suning_uos_patched
b791d1193a
On some CPUs, it is more efficient to disable and enable interrupts in the kernel rather than use ll/sc for atomic operations. But if we were to set cpu_has_llsc to false, we would break the userspace futex interface (in asm/futex.h). We separate the two concepts, with a new predicate kernel_uses_llsc, that lets us disable the kernel's use of ll/sc while still allowing the futex code to use it. Also there were a couple of cases in bitops.h where we were using ll/sc unconditionally even if cpu_has_llsc were false. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
125 lines
3.1 KiB
C
125 lines
3.1 KiB
C
/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
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*/
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#ifndef __ASM_CMPXCHG_H
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#define __ASM_CMPXCHG_H
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#include <linux/irqflags.h>
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#define __HAVE_ARCH_CMPXCHG 1
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#define __cmpxchg_asm(ld, st, m, old, new) \
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({ \
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__typeof(*(m)) __ret; \
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\
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if (kernel_uses_llsc && R10000_LLSC_WAR) { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" .set mips3 \n" \
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"1: " ld " %0, %2 # __cmpxchg_asm \n" \
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" bne %0, %z3, 2f \n" \
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" .set mips0 \n" \
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" move $1, %z4 \n" \
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" .set mips3 \n" \
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" " st " $1, %1 \n" \
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" beqzl $1, 1b \n" \
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"2: \n" \
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" .set pop \n" \
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: "=&r" (__ret), "=R" (*m) \
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: "R" (*m), "Jr" (old), "Jr" (new) \
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: "memory"); \
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} else if (kernel_uses_llsc) { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" .set mips3 \n" \
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"1: " ld " %0, %2 # __cmpxchg_asm \n" \
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" bne %0, %z3, 2f \n" \
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" .set mips0 \n" \
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" move $1, %z4 \n" \
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" .set mips3 \n" \
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" " st " $1, %1 \n" \
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" beqz $1, 3f \n" \
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"2: \n" \
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" .subsection 2 \n" \
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"3: b 1b \n" \
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" .previous \n" \
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" .set pop \n" \
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: "=&r" (__ret), "=R" (*m) \
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: "R" (*m), "Jr" (old), "Jr" (new) \
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: "memory"); \
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} else { \
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unsigned long __flags; \
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\
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raw_local_irq_save(__flags); \
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__ret = *m; \
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if (__ret == old) \
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*m = new; \
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raw_local_irq_restore(__flags); \
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} \
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\
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__ret; \
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})
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/*
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* This function doesn't exist, so you'll get a linker error
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* if something tries to do an invalid cmpxchg().
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*/
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extern void __cmpxchg_called_with_bad_pointer(void);
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#define __cmpxchg(ptr, old, new, barrier) \
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({ \
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__typeof__(ptr) __ptr = (ptr); \
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__typeof__(*(ptr)) __old = (old); \
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__typeof__(*(ptr)) __new = (new); \
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__typeof__(*(ptr)) __res = 0; \
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\
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barrier; \
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\
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switch (sizeof(*(__ptr))) { \
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case 4: \
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__res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); \
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break; \
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case 8: \
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if (sizeof(long) == 8) { \
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__res = __cmpxchg_asm("lld", "scd", __ptr, \
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__old, __new); \
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break; \
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} \
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default: \
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__cmpxchg_called_with_bad_pointer(); \
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break; \
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} \
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\
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barrier; \
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\
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__res; \
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})
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#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
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#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new, )
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#define cmpxchg64(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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cmpxchg((ptr), (o), (n)); \
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})
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#ifdef CONFIG_64BIT
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#define cmpxchg64_local(ptr, o, n) \
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({ \
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BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
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cmpxchg_local((ptr), (o), (n)); \
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})
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#else
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#include <asm-generic/cmpxchg-local.h>
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#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
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#endif
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#endif /* __ASM_CMPXCHG_H */
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