forked from luck/tmp_suning_uos_patched
aed058e871
ICE1712 driver Provides preliminary support for the Terratec Phase 28 card. Not extensively tested and probably buggy, but it seems to work. Signed-off-by: Simone Zinanni <simone@develer.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
52 lines
1.7 KiB
C
52 lines
1.7 KiB
C
#ifndef __SOUND_PHASE_H
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#define __SOUND_PHASE_H
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/*
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* ALSA driver for ICEnsemble ICE1712 (Envy24)
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*
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* Lowlevel functions for Terratec PHASE 22
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*
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* Copyright (c) 2005 Misha Zhilin <misha@epiphan.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#define PHASE_DEVICE_DESC "{Terratec,Phase 22},"\
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"{Terratec,Phase 28},"
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#define VT1724_SUBDEVICE_PHASE22 0x3b155011
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#define VT1724_SUBDEVICE_PHASE28 0x3b154911
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/* entry point */
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extern struct snd_ice1712_card_info snd_vt1724_phase_cards[];
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/* PHASE28 GPIO bits */
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#define PHASE28_SPI_MISO (1 << 21)
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#define PHASE28_WM_RESET (1 << 20)
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#define PHASE28_SPI_CLK (1 << 19)
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#define PHASE28_SPI_MOSI (1 << 18)
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#define PHASE28_WM_RW (1 << 17)
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#define PHASE28_AC97_RESET (1 << 16)
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#define PHASE28_DIGITAL_SEL1 (1 << 15)
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#define PHASE28_HP_SEL (1 << 14)
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#define PHASE28_WM_CS (1 << 12)
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#define PHASE28_AC97_COMMIT (1 << 11)
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#define PHASE28_AC97_ADDR (1 << 10)
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#define PHASE28_AC97_DATA_LOW (1 << 9)
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#define PHASE28_AC97_DATA_HIGH (1 << 8)
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#define PHASE28_AC97_DATA_MASK 0xFF
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#endif /* __SOUND_PHASE */
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