forked from luck/tmp_suning_uos_patched
8ceee660aa
The driver supports the 10Xpress PHY and XFP modules on our reference designs SFE4001 and SFE4002 and the SMC models SMC10GPCIe-XFP and SMC10GPCIe-10BT. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
453 lines
12 KiB
C
453 lines
12 KiB
C
/****************************************************************************
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* Driver for Solarflare Solarstorm network controllers and boards
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* Copyright 2005-2006 Fen Systems Ltd.
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* Copyright 2005-2008 Solarflare Communications Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation, incorporated herein by reference.
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*/
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#include <linux/pci.h>
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#include <linux/tcp.h>
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#include <linux/ip.h>
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#include <linux/in.h>
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#include <linux/if_ether.h>
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#include <linux/highmem.h>
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#include "net_driver.h"
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#include "tx.h"
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#include "efx.h"
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#include "falcon.h"
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#include "workarounds.h"
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/*
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* TX descriptor ring full threshold
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*
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* The tx_queue descriptor ring fill-level must fall below this value
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* before we restart the netif queue
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*/
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#define EFX_NETDEV_TX_THRESHOLD(_tx_queue) \
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(_tx_queue->efx->type->txd_ring_mask / 2u)
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/* We want to be able to nest calls to netif_stop_queue(), since each
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* channel can have an individual stop on the queue.
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*/
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void efx_stop_queue(struct efx_nic *efx)
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{
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spin_lock_bh(&efx->netif_stop_lock);
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EFX_TRACE(efx, "stop TX queue\n");
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atomic_inc(&efx->netif_stop_count);
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netif_stop_queue(efx->net_dev);
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spin_unlock_bh(&efx->netif_stop_lock);
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}
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/* Wake netif's TX queue
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* We want to be able to nest calls to netif_stop_queue(), since each
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* channel can have an individual stop on the queue.
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*/
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inline void efx_wake_queue(struct efx_nic *efx)
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{
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local_bh_disable();
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if (atomic_dec_and_lock(&efx->netif_stop_count,
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&efx->netif_stop_lock)) {
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EFX_TRACE(efx, "waking TX queue\n");
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netif_wake_queue(efx->net_dev);
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spin_unlock(&efx->netif_stop_lock);
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}
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local_bh_enable();
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}
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static inline void efx_dequeue_buffer(struct efx_tx_queue *tx_queue,
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struct efx_tx_buffer *buffer)
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{
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if (buffer->unmap_len) {
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struct pci_dev *pci_dev = tx_queue->efx->pci_dev;
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if (buffer->unmap_single)
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pci_unmap_single(pci_dev, buffer->unmap_addr,
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buffer->unmap_len, PCI_DMA_TODEVICE);
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else
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pci_unmap_page(pci_dev, buffer->unmap_addr,
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buffer->unmap_len, PCI_DMA_TODEVICE);
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buffer->unmap_len = 0;
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buffer->unmap_single = 0;
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}
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if (buffer->skb) {
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dev_kfree_skb_any((struct sk_buff *) buffer->skb);
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buffer->skb = NULL;
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EFX_TRACE(tx_queue->efx, "TX queue %d transmission id %x "
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"complete\n", tx_queue->queue, read_ptr);
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}
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}
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/*
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* Add a socket buffer to a TX queue
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*
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* This maps all fragments of a socket buffer for DMA and adds them to
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* the TX queue. The queue's insert pointer will be incremented by
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* the number of fragments in the socket buffer.
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*
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* If any DMA mapping fails, any mapped fragments will be unmapped,
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* the queue's insert pointer will be restored to its original value.
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*
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* Returns NETDEV_TX_OK or NETDEV_TX_BUSY
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* You must hold netif_tx_lock() to call this function.
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*/
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static inline int efx_enqueue_skb(struct efx_tx_queue *tx_queue,
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const struct sk_buff *skb)
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{
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struct efx_nic *efx = tx_queue->efx;
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struct pci_dev *pci_dev = efx->pci_dev;
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struct efx_tx_buffer *buffer;
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skb_frag_t *fragment;
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struct page *page;
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int page_offset;
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unsigned int len, unmap_len = 0, fill_level, insert_ptr, misalign;
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dma_addr_t dma_addr, unmap_addr = 0;
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unsigned int dma_len;
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unsigned unmap_single;
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int q_space, i = 0;
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int rc = NETDEV_TX_OK;
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EFX_BUG_ON_PARANOID(tx_queue->write_count != tx_queue->insert_count);
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/* Get size of the initial fragment */
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len = skb_headlen(skb);
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fill_level = tx_queue->insert_count - tx_queue->old_read_count;
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q_space = efx->type->txd_ring_mask - 1 - fill_level;
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/* Map for DMA. Use pci_map_single rather than pci_map_page
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* since this is more efficient on machines with sparse
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* memory.
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*/
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unmap_single = 1;
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dma_addr = pci_map_single(pci_dev, skb->data, len, PCI_DMA_TODEVICE);
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/* Process all fragments */
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while (1) {
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if (unlikely(pci_dma_mapping_error(dma_addr)))
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goto pci_err;
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/* Store fields for marking in the per-fragment final
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* descriptor */
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unmap_len = len;
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unmap_addr = dma_addr;
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/* Add to TX queue, splitting across DMA boundaries */
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do {
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if (unlikely(q_space-- <= 0)) {
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/* It might be that completions have
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* happened since the xmit path last
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* checked. Update the xmit path's
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* copy of read_count.
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*/
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++tx_queue->stopped;
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/* This memory barrier protects the
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* change of stopped from the access
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* of read_count. */
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smp_mb();
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tx_queue->old_read_count =
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*(volatile unsigned *)
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&tx_queue->read_count;
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fill_level = (tx_queue->insert_count
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- tx_queue->old_read_count);
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q_space = (efx->type->txd_ring_mask - 1 -
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fill_level);
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if (unlikely(q_space-- <= 0))
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goto stop;
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smp_mb();
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--tx_queue->stopped;
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}
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insert_ptr = (tx_queue->insert_count &
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efx->type->txd_ring_mask);
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buffer = &tx_queue->buffer[insert_ptr];
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EFX_BUG_ON_PARANOID(buffer->skb);
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EFX_BUG_ON_PARANOID(buffer->len);
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EFX_BUG_ON_PARANOID(buffer->continuation != 1);
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EFX_BUG_ON_PARANOID(buffer->unmap_len);
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dma_len = (((~dma_addr) & efx->type->tx_dma_mask) + 1);
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if (likely(dma_len > len))
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dma_len = len;
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misalign = (unsigned)dma_addr & efx->type->bug5391_mask;
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if (misalign && dma_len + misalign > 512)
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dma_len = 512 - misalign;
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/* Fill out per descriptor fields */
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buffer->len = dma_len;
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buffer->dma_addr = dma_addr;
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len -= dma_len;
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dma_addr += dma_len;
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++tx_queue->insert_count;
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} while (len);
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/* Transfer ownership of the unmapping to the final buffer */
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buffer->unmap_addr = unmap_addr;
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buffer->unmap_single = unmap_single;
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buffer->unmap_len = unmap_len;
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unmap_len = 0;
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/* Get address and size of next fragment */
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if (i >= skb_shinfo(skb)->nr_frags)
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break;
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fragment = &skb_shinfo(skb)->frags[i];
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len = fragment->size;
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page = fragment->page;
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page_offset = fragment->page_offset;
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i++;
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/* Map for DMA */
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unmap_single = 0;
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dma_addr = pci_map_page(pci_dev, page, page_offset, len,
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PCI_DMA_TODEVICE);
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}
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/* Transfer ownership of the skb to the final buffer */
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buffer->skb = skb;
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buffer->continuation = 0;
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/* Pass off to hardware */
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falcon_push_buffers(tx_queue);
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return NETDEV_TX_OK;
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pci_err:
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EFX_ERR_RL(efx, " TX queue %d could not map skb with %d bytes %d "
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"fragments for DMA\n", tx_queue->queue, skb->len,
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skb_shinfo(skb)->nr_frags + 1);
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/* Mark the packet as transmitted, and free the SKB ourselves */
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dev_kfree_skb_any((struct sk_buff *)skb);
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goto unwind;
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stop:
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rc = NETDEV_TX_BUSY;
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if (tx_queue->stopped == 1)
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efx_stop_queue(efx);
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unwind:
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/* Work backwards until we hit the original insert pointer value */
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while (tx_queue->insert_count != tx_queue->write_count) {
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--tx_queue->insert_count;
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insert_ptr = tx_queue->insert_count & efx->type->txd_ring_mask;
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buffer = &tx_queue->buffer[insert_ptr];
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efx_dequeue_buffer(tx_queue, buffer);
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buffer->len = 0;
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}
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/* Free the fragment we were mid-way through pushing */
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if (unmap_len)
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pci_unmap_page(pci_dev, unmap_addr, unmap_len,
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PCI_DMA_TODEVICE);
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return rc;
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}
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/* Remove packets from the TX queue
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*
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* This removes packets from the TX queue, up to and including the
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* specified index.
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*/
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static inline void efx_dequeue_buffers(struct efx_tx_queue *tx_queue,
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unsigned int index)
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{
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struct efx_nic *efx = tx_queue->efx;
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unsigned int stop_index, read_ptr;
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unsigned int mask = tx_queue->efx->type->txd_ring_mask;
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stop_index = (index + 1) & mask;
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read_ptr = tx_queue->read_count & mask;
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while (read_ptr != stop_index) {
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struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
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if (unlikely(buffer->len == 0)) {
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EFX_ERR(tx_queue->efx, "TX queue %d spurious TX "
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"completion id %x\n", tx_queue->queue,
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read_ptr);
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efx_schedule_reset(efx, RESET_TYPE_TX_SKIP);
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return;
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}
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efx_dequeue_buffer(tx_queue, buffer);
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buffer->continuation = 1;
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buffer->len = 0;
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++tx_queue->read_count;
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read_ptr = tx_queue->read_count & mask;
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}
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}
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/* Initiate a packet transmission on the specified TX queue.
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* Note that returning anything other than NETDEV_TX_OK will cause the
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* OS to free the skb.
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*
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* This function is split out from efx_hard_start_xmit to allow the
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* loopback test to direct packets via specific TX queues. It is
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* therefore a non-static inline, so as not to penalise performance
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* for non-loopback transmissions.
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*
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* Context: netif_tx_lock held
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*/
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inline int efx_xmit(struct efx_nic *efx,
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struct efx_tx_queue *tx_queue, struct sk_buff *skb)
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{
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int rc;
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/* Map fragments for DMA and add to TX queue */
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rc = efx_enqueue_skb(tx_queue, skb);
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if (unlikely(rc != NETDEV_TX_OK))
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goto out;
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/* Update last TX timer */
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efx->net_dev->trans_start = jiffies;
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out:
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return rc;
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}
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/* Initiate a packet transmission. We use one channel per CPU
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* (sharing when we have more CPUs than channels). On Falcon, the TX
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* completion events will be directed back to the CPU that transmitted
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* the packet, which should be cache-efficient.
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*
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* Context: non-blocking.
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* Note that returning anything other than NETDEV_TX_OK will cause the
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* OS to free the skb.
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*/
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int efx_hard_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
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{
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struct efx_nic *efx = net_dev->priv;
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return efx_xmit(efx, &efx->tx_queue[0], skb);
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}
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void efx_xmit_done(struct efx_tx_queue *tx_queue, unsigned int index)
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{
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unsigned fill_level;
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struct efx_nic *efx = tx_queue->efx;
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EFX_BUG_ON_PARANOID(index > efx->type->txd_ring_mask);
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efx_dequeue_buffers(tx_queue, index);
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/* See if we need to restart the netif queue. This barrier
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* separates the update of read_count from the test of
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* stopped. */
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smp_mb();
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if (unlikely(tx_queue->stopped)) {
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fill_level = tx_queue->insert_count - tx_queue->read_count;
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if (fill_level < EFX_NETDEV_TX_THRESHOLD(tx_queue)) {
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EFX_BUG_ON_PARANOID(!NET_DEV_REGISTERED(efx));
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/* Do this under netif_tx_lock(), to avoid racing
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* with efx_xmit(). */
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netif_tx_lock(efx->net_dev);
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if (tx_queue->stopped) {
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tx_queue->stopped = 0;
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efx_wake_queue(efx);
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}
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netif_tx_unlock(efx->net_dev);
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}
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}
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}
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int efx_probe_tx_queue(struct efx_tx_queue *tx_queue)
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{
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struct efx_nic *efx = tx_queue->efx;
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unsigned int txq_size;
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int i, rc;
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EFX_LOG(efx, "creating TX queue %d\n", tx_queue->queue);
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/* Allocate software ring */
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txq_size = (efx->type->txd_ring_mask + 1) * sizeof(*tx_queue->buffer);
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tx_queue->buffer = kzalloc(txq_size, GFP_KERNEL);
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if (!tx_queue->buffer) {
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rc = -ENOMEM;
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goto fail1;
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}
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for (i = 0; i <= efx->type->txd_ring_mask; ++i)
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tx_queue->buffer[i].continuation = 1;
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/* Allocate hardware ring */
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rc = falcon_probe_tx(tx_queue);
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if (rc)
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goto fail2;
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return 0;
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fail2:
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kfree(tx_queue->buffer);
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tx_queue->buffer = NULL;
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fail1:
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tx_queue->used = 0;
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return rc;
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}
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int efx_init_tx_queue(struct efx_tx_queue *tx_queue)
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{
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EFX_LOG(tx_queue->efx, "initialising TX queue %d\n", tx_queue->queue);
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tx_queue->insert_count = 0;
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tx_queue->write_count = 0;
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tx_queue->read_count = 0;
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tx_queue->old_read_count = 0;
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BUG_ON(tx_queue->stopped);
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/* Set up TX descriptor ring */
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return falcon_init_tx(tx_queue);
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}
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void efx_release_tx_buffers(struct efx_tx_queue *tx_queue)
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{
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struct efx_tx_buffer *buffer;
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if (!tx_queue->buffer)
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return;
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/* Free any buffers left in the ring */
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while (tx_queue->read_count != tx_queue->write_count) {
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buffer = &tx_queue->buffer[tx_queue->read_count &
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tx_queue->efx->type->txd_ring_mask];
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efx_dequeue_buffer(tx_queue, buffer);
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buffer->continuation = 1;
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buffer->len = 0;
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++tx_queue->read_count;
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}
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}
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void efx_fini_tx_queue(struct efx_tx_queue *tx_queue)
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{
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EFX_LOG(tx_queue->efx, "shutting down TX queue %d\n", tx_queue->queue);
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/* Flush TX queue, remove descriptor ring */
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falcon_fini_tx(tx_queue);
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efx_release_tx_buffers(tx_queue);
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/* Release queue's stop on port, if any */
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if (tx_queue->stopped) {
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tx_queue->stopped = 0;
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efx_wake_queue(tx_queue->efx);
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}
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}
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void efx_remove_tx_queue(struct efx_tx_queue *tx_queue)
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{
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EFX_LOG(tx_queue->efx, "destroying TX queue %d\n", tx_queue->queue);
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falcon_remove_tx(tx_queue);
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kfree(tx_queue->buffer);
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tx_queue->buffer = NULL;
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tx_queue->used = 0;
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}
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