forked from luck/tmp_suning_uos_patched
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
508 lines
14 KiB
C
508 lines
14 KiB
C
/*
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**********************************************************************
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* hwaccess.c -- Hardware access layer
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* Copyright 1999, 2000 Creative Labs, Inc.
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*
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**********************************************************************
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*
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* Date Author Summary of changes
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* ---- ------ ------------------
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* October 20, 1999 Bertrand Lee base code release
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* December 9, 1999 Jon Taylor rewrote the I/O subsystem
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*
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**********************************************************************
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public
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* License along with this program; if not, write to the Free
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* Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
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* USA.
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*
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**********************************************************************
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*/
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#include <asm/io.h>
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#include "hwaccess.h"
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#include "8010.h"
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#include "icardmid.h"
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/*************************************************************************
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* Function : srToPitch *
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* Input : sampleRate - sampling rate *
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* Return : pitch value *
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* About : convert sampling rate to pitch *
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* Note : for 8010, sampling rate is at 48kHz, this function should *
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* be changed. *
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*************************************************************************/
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u32 srToPitch(u32 sampleRate)
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{
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int i;
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/* FIXME: These tables should be defined in a headerfile */
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static u32 logMagTable[128] = {
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0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
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0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
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0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
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0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
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0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
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0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
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0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
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0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
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0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
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0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
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0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
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0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
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0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
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0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
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0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
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0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
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};
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static char logSlopeTable[128] = {
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0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
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0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
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0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
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0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
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0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
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0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
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0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
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0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
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0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
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0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
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0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
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0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
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0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
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0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
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0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
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0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
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};
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if (sampleRate == 0)
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return 0; /* Bail out if no leading "1" */
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sampleRate *= 11185; /* Scale 48000 to 0x20002380 */
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for (i = 31; i > 0; i--) {
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if (sampleRate & 0x80000000) { /* Detect leading "1" */
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return (u32) (((s32) (i - 15) << 20) +
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logMagTable[0x7f & (sampleRate >> 24)] +
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(0x7f & (sampleRate >> 17)) * logSlopeTable[0x7f & (sampleRate >> 24)]);
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}
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sampleRate = sampleRate << 1;
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}
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DPF(2, "srToPitch: BUG!\n");
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return 0; /* Should never reach this point */
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}
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/*******************************************
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* write/read PCI function 0 registers *
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********************************************/
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void emu10k1_writefn0(struct emu10k1_card *card, u32 reg, u32 data)
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{
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unsigned long flags;
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if (reg & 0xff000000) {
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u32 mask;
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u8 size, offset;
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size = (reg >> 24) & 0x3f;
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offset = (reg >> 16) & 0x1f;
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mask = ((1 << size) - 1) << offset;
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data = (data << offset) & mask;
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reg &= 0x7f;
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spin_lock_irqsave(&card->lock, flags);
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data |= inl(card->iobase + reg) & ~mask;
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outl(data, card->iobase + reg);
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spin_unlock_irqrestore(&card->lock, flags);
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} else {
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spin_lock_irqsave(&card->lock, flags);
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outl(data, card->iobase + reg);
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spin_unlock_irqrestore(&card->lock, flags);
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}
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return;
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}
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#ifdef DBGEMU
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void emu10k1_writefn0_2(struct emu10k1_card *card, u32 reg, u32 data, int size)
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{
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unsigned long flags;
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spin_lock_irqsave(&card->lock, flags);
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if (size == 32)
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outl(data, card->iobase + (reg & 0x1F));
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else if (size == 16)
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outw(data, card->iobase + (reg & 0x1F));
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else
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outb(data, card->iobase + (reg & 0x1F));
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spin_unlock_irqrestore(&card->lock, flags);
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return;
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}
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#endif /* DBGEMU */
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u32 emu10k1_readfn0(struct emu10k1_card * card, u32 reg)
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{
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u32 val;
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unsigned long flags;
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if (reg & 0xff000000) {
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u32 mask;
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u8 size, offset;
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size = (reg >> 24) & 0x3f;
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offset = (reg >> 16) & 0x1f;
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mask = ((1 << size) - 1) << offset;
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reg &= 0x7f;
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spin_lock_irqsave(&card->lock, flags);
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val = inl(card->iobase + reg);
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spin_unlock_irqrestore(&card->lock, flags);
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return (val & mask) >> offset;
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} else {
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spin_lock_irqsave(&card->lock, flags);
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val = inl(card->iobase + reg);
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spin_unlock_irqrestore(&card->lock, flags);
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return val;
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}
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}
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void emu10k1_timer_set(struct emu10k1_card * card, u16 data)
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{
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unsigned long flags;
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spin_lock_irqsave(&card->lock, flags);
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outw(data & TIMER_RATE_MASK, card->iobase + TIMER);
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spin_unlock_irqrestore(&card->lock, flags);
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}
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/************************************************************************
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* write/read Emu10k1 pointer-offset register set, accessed through *
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* the PTR and DATA registers *
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*************************************************************************/
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#define A_PTR_ADDRESS_MASK 0x0fff0000
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void sblive_writeptr(struct emu10k1_card *card, u32 reg, u32 channel, u32 data)
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{
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u32 regptr;
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unsigned long flags;
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regptr = ((reg << 16) & A_PTR_ADDRESS_MASK) | (channel & PTR_CHANNELNUM_MASK);
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if (reg & 0xff000000) {
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u32 mask;
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u8 size, offset;
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size = (reg >> 24) & 0x3f;
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offset = (reg >> 16) & 0x1f;
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mask = ((1 << size) - 1) << offset;
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data = (data << offset) & mask;
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spin_lock_irqsave(&card->lock, flags);
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outl(regptr, card->iobase + PTR);
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data |= inl(card->iobase + DATA) & ~mask;
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outl(data, card->iobase + DATA);
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spin_unlock_irqrestore(&card->lock, flags);
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} else {
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spin_lock_irqsave(&card->lock, flags);
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outl(regptr, card->iobase + PTR);
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outl(data, card->iobase + DATA);
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spin_unlock_irqrestore(&card->lock, flags);
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}
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}
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/* ... : data, reg, ... , TAGLIST_END */
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void sblive_writeptr_tag(struct emu10k1_card *card, u32 channel, ...)
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{
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va_list args;
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unsigned long flags;
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u32 reg;
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va_start(args, channel);
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spin_lock_irqsave(&card->lock, flags);
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while ((reg = va_arg(args, u32)) != TAGLIST_END) {
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u32 data = va_arg(args, u32);
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u32 regptr = (((reg << 16) & A_PTR_ADDRESS_MASK)
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| (channel & PTR_CHANNELNUM_MASK));
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outl(regptr, card->iobase + PTR);
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if (reg & 0xff000000) {
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int size = (reg >> 24) & 0x3f;
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int offset = (reg >> 16) & 0x1f;
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u32 mask = ((1 << size) - 1) << offset;
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data = (data << offset) & mask;
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data |= inl(card->iobase + DATA) & ~mask;
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}
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outl(data, card->iobase + DATA);
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}
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spin_unlock_irqrestore(&card->lock, flags);
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va_end(args);
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return;
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}
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u32 sblive_readptr(struct emu10k1_card * card, u32 reg, u32 channel)
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{
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u32 regptr, val;
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unsigned long flags;
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regptr = ((reg << 16) & A_PTR_ADDRESS_MASK) | (channel & PTR_CHANNELNUM_MASK);
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if (reg & 0xff000000) {
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u32 mask;
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u8 size, offset;
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size = (reg >> 24) & 0x3f;
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offset = (reg >> 16) & 0x1f;
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mask = ((1 << size) - 1) << offset;
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spin_lock_irqsave(&card->lock, flags);
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outl(regptr, card->iobase + PTR);
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val = inl(card->iobase + DATA);
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spin_unlock_irqrestore(&card->lock, flags);
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return (val & mask) >> offset;
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} else {
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spin_lock_irqsave(&card->lock, flags);
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outl(regptr, card->iobase + PTR);
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val = inl(card->iobase + DATA);
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spin_unlock_irqrestore(&card->lock, flags);
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return val;
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}
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}
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void emu10k1_irq_enable(struct emu10k1_card *card, u32 irq_mask)
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{
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u32 val;
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unsigned long flags;
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DPF(2,"emu10k1_irq_enable()\n");
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spin_lock_irqsave(&card->lock, flags);
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val = inl(card->iobase + INTE) | irq_mask;
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outl(val, card->iobase + INTE);
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spin_unlock_irqrestore(&card->lock, flags);
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return;
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}
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void emu10k1_irq_disable(struct emu10k1_card *card, u32 irq_mask)
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{
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u32 val;
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unsigned long flags;
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DPF(2,"emu10k1_irq_disable()\n");
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spin_lock_irqsave(&card->lock, flags);
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val = inl(card->iobase + INTE) & ~irq_mask;
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outl(val, card->iobase + INTE);
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spin_unlock_irqrestore(&card->lock, flags);
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return;
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}
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void emu10k1_clear_stop_on_loop(struct emu10k1_card *card, u32 voicenum)
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{
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/* Voice interrupt */
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if (voicenum >= 32)
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sblive_writeptr(card, SOLEH | ((0x0100 | (voicenum - 32)) << 16), 0, 0);
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else
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sblive_writeptr(card, SOLEL | ((0x0100 | voicenum) << 16), 0, 0);
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return;
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}
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static void sblive_wcwait(struct emu10k1_card *card, u32 wait)
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{
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volatile unsigned uCount;
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u32 newtime = 0, curtime;
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curtime = emu10k1_readfn0(card, WC_SAMPLECOUNTER);
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while (wait--) {
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uCount = 0;
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while (uCount++ < TIMEOUT) {
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newtime = emu10k1_readfn0(card, WC_SAMPLECOUNTER);
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if (newtime != curtime)
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break;
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}
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if (uCount >= TIMEOUT)
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break;
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curtime = newtime;
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}
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}
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u16 emu10k1_ac97_read(struct ac97_codec *codec, u8 reg)
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{
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struct emu10k1_card *card = codec->private_data;
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u16 data;
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unsigned long flags;
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spin_lock_irqsave(&card->lock, flags);
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outb(reg, card->iobase + AC97ADDRESS);
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data = inw(card->iobase + AC97DATA);
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spin_unlock_irqrestore(&card->lock, flags);
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return data;
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}
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void emu10k1_ac97_write(struct ac97_codec *codec, u8 reg, u16 value)
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{
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struct emu10k1_card *card = codec->private_data;
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unsigned long flags;
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spin_lock_irqsave(&card->lock, flags);
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outb(reg, card->iobase + AC97ADDRESS);
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outw(value, card->iobase + AC97DATA);
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outb( AC97_EXTENDED_ID, card->iobase + AC97ADDRESS);
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spin_unlock_irqrestore(&card->lock, flags);
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}
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/*********************************************************
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* MPU access functions *
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**********************************************************/
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int emu10k1_mpu_write_data(struct emu10k1_card *card, u8 data)
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{
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unsigned long flags;
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int ret;
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if (card->is_audigy) {
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if ((sblive_readptr(card, A_MUSTAT,0) & MUSTAT_ORDYN) == 0) {
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sblive_writeptr(card, A_MUDATA, 0, data);
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ret = 0;
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} else
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ret = -1;
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} else {
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spin_lock_irqsave(&card->lock, flags);
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if ((inb(card->iobase + MUSTAT) & MUSTAT_ORDYN) == 0) {
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outb(data, card->iobase + MUDATA);
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ret = 0;
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} else
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ret = -1;
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spin_unlock_irqrestore(&card->lock, flags);
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}
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return ret;
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}
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int emu10k1_mpu_read_data(struct emu10k1_card *card, u8 * data)
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{
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unsigned long flags;
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int ret;
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if (card->is_audigy) {
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if ((sblive_readptr(card, A_MUSTAT,0) & MUSTAT_IRDYN) == 0) {
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*data = sblive_readptr(card, A_MUDATA,0);
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ret = 0;
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} else
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ret = -1;
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} else {
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spin_lock_irqsave(&card->lock, flags);
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if ((inb(card->iobase + MUSTAT) & MUSTAT_IRDYN) == 0) {
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*data = inb(card->iobase + MUDATA);
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ret = 0;
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} else
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ret = -1;
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spin_unlock_irqrestore(&card->lock, flags);
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}
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return ret;
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}
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int emu10k1_mpu_reset(struct emu10k1_card *card)
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{
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u8 status;
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unsigned long flags;
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DPF(2, "emu10k1_mpu_reset()\n");
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if (card->is_audigy) {
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if (card->mpuacqcount == 0) {
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sblive_writeptr(card, A_MUCMD, 0, MUCMD_RESET);
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sblive_wcwait(card, 8);
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sblive_writeptr(card, A_MUCMD, 0, MUCMD_RESET);
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sblive_wcwait(card, 8);
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sblive_writeptr(card, A_MUCMD, 0, MUCMD_ENTERUARTMODE);
|
|
sblive_wcwait(card, 8);
|
|
status = sblive_readptr(card, A_MUDATA, 0);
|
|
if (status == 0xfe)
|
|
return 0;
|
|
else
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
} else {
|
|
if (card->mpuacqcount == 0) {
|
|
spin_lock_irqsave(&card->lock, flags);
|
|
outb(MUCMD_RESET, card->iobase + MUCMD);
|
|
spin_unlock_irqrestore(&card->lock, flags);
|
|
|
|
sblive_wcwait(card, 8);
|
|
|
|
spin_lock_irqsave(&card->lock, flags);
|
|
outb(MUCMD_RESET, card->iobase + MUCMD);
|
|
spin_unlock_irqrestore(&card->lock, flags);
|
|
|
|
sblive_wcwait(card, 8);
|
|
|
|
spin_lock_irqsave(&card->lock, flags);
|
|
outb(MUCMD_ENTERUARTMODE, card->iobase + MUCMD);
|
|
spin_unlock_irqrestore(&card->lock, flags);
|
|
|
|
sblive_wcwait(card, 8);
|
|
|
|
spin_lock_irqsave(&card->lock, flags);
|
|
status = inb(card->iobase + MUDATA);
|
|
spin_unlock_irqrestore(&card->lock, flags);
|
|
|
|
if (status == 0xfe)
|
|
return 0;
|
|
else
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
int emu10k1_mpu_acquire(struct emu10k1_card *card)
|
|
{
|
|
/* FIXME: This should be a macro */
|
|
++card->mpuacqcount;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int emu10k1_mpu_release(struct emu10k1_card *card)
|
|
{
|
|
/* FIXME: this should be a macro */
|
|
--card->mpuacqcount;
|
|
|
|
return 0;
|
|
}
|