forked from luck/tmp_suning_uos_patched
72531c9434
According to the datasheet:
The BIT[5:4] of ADC Control Register 2 is to control the word width.
00 = 25 Bits
01 = 20 Bits
10 = 16 Bits
11 = Invalid
Thus, the AD1836_ADC_WORD_OFFSET should be defined as 4.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@vger.kernel.org
52 lines
1.5 KiB
C
52 lines
1.5 KiB
C
/*
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* Audio Codec driver supporting:
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* AD1835A, AD1836, AD1837A, AD1838A, AD1839A
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*
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* Copyright 2009-2011 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#ifndef __AD1836_H__
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#define __AD1836_H__
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#define AD1836_DAC_CTRL1 0
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#define AD1836_DAC_POWERDOWN 2
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#define AD1836_DAC_SERFMT_MASK 0xE0
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#define AD1836_DAC_SERFMT_PCK256 (0x4 << 5)
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#define AD1836_DAC_SERFMT_PCK128 (0x5 << 5)
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#define AD1836_DAC_WORD_LEN_MASK 0x18
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#define AD1836_DAC_WORD_LEN_OFFSET 3
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#define AD1836_DAC_CTRL2 1
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/* These macros are one-based. So AD183X_MUTE_LEFT(1) will return the mute bit
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* for the first ADC/DAC */
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#define AD1836_MUTE_LEFT(x) (((x) * 2) - 2)
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#define AD1836_MUTE_RIGHT(x) (((x) * 2) - 1)
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#define AD1836_DAC_L_VOL(x) ((x) * 2)
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#define AD1836_DAC_R_VOL(x) (1 + ((x) * 2))
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#define AD1836_ADC_CTRL1 12
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#define AD1836_ADC_POWERDOWN 7
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#define AD1836_ADC_HIGHPASS_FILTER 8
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#define AD1836_ADC_CTRL2 13
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#define AD1836_ADC_WORD_LEN_MASK 0x30
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#define AD1836_ADC_WORD_OFFSET 4
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#define AD1836_ADC_SERFMT_MASK (7 << 6)
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#define AD1836_ADC_SERFMT_PCK256 (0x4 << 6)
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#define AD1836_ADC_SERFMT_PCK128 (0x5 << 6)
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#define AD1836_ADC_AUX (0x6 << 6)
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#define AD1836_ADC_CTRL3 14
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#define AD1836_NUM_REGS 16
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#define AD1836_WORD_LEN_24 0x0
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#define AD1836_WORD_LEN_20 0x1
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#define AD1836_WORD_LEN_16 0x2
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#endif
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