forked from luck/tmp_suning_uos_patched
4c7c997886
This fixes up a typo in the ll/sc based cmpxchg code which apparently wasn't getting a lot of testing due to the swapped old/new pair. With that fixed up, the ll/sc code also starts using it and provides its own atomic_add_unless(). Signed-off-by: Aoi Shinkai <shinkoi2005@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
135 lines
2.7 KiB
C
135 lines
2.7 KiB
C
#ifndef __ASM_SH_ATOMIC_LLSC_H
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#define __ASM_SH_ATOMIC_LLSC_H
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/*
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* To get proper branch prediction for the main line, we must branch
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* forward to code at the end of this object's .text section, then
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* branch back to restart the operation.
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*/
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static inline void atomic_add(int i, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_add \n"
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" add %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (i), "r" (&v->counter)
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: "t");
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}
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static inline void atomic_sub(int i, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_sub \n"
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" sub %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (i), "r" (&v->counter)
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: "t");
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}
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/*
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* SH-4A note:
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*
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* We basically get atomic_xxx_return() for free compared with
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* atomic_xxx(). movli.l/movco.l require r0 due to the instruction
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* encoding, so the retval is automatically set without having to
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* do any special work.
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*/
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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unsigned long temp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_add_return \n"
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" add %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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" synco \n"
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: "=&z" (temp)
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: "r" (i), "r" (&v->counter)
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: "t");
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return temp;
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}
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static inline int atomic_sub_return(int i, atomic_t *v)
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{
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unsigned long temp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_sub_return \n"
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" sub %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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" synco \n"
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: "=&z" (temp)
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: "r" (i), "r" (&v->counter)
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: "t");
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return temp;
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}
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static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_clear_mask \n"
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" and %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (~mask), "r" (&v->counter)
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: "t");
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}
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static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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unsigned long tmp;
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__asm__ __volatile__ (
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"1: movli.l @%2, %0 ! atomic_set_mask \n"
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" or %1, %0 \n"
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" movco.l %0, @%2 \n"
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" bf 1b \n"
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: "=&z" (tmp)
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: "r" (mask), "r" (&v->counter)
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: "t");
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}
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#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
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/**
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* atomic_add_unless - add unless the number is a given value
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* @v: pointer of type atomic_t
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* @a: the amount to add to v...
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* @u: ...unless v is equal to u.
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*
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* Atomically adds @a to @v, so long as it was not @u.
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* Returns non-zero if @v was not @u, and zero otherwise.
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*/
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static inline int atomic_add_unless(atomic_t *v, int a, int u)
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{
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int c, old;
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c = atomic_read(v);
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for (;;) {
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if (unlikely(c == (u)))
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break;
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old = atomic_cmpxchg((v), c, c + (a));
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if (likely(old == c))
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break;
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c = old;
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}
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return c != (u);
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}
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#endif /* __ASM_SH_ATOMIC_LLSC_H */
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