forked from luck/tmp_suning_uos_patched
19df0c2fef
Currently percpu readmostly subsection may share cachelines with other percpu subsections which may result in unnecessary cacheline bounce and performance degradation. This patch adds @cacheline parameter to PERCPU() and PERCPU_VADDR() linker macros, makes each arch linker scripts specify its cacheline size and use it to align percpu subsections. This is based on Shaohua's x86 only patch. Signed-off-by: Tejun Heo <tj@kernel.org> Cc: Shaohua Li <shaohua.li@intel.com> |
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.. | ||
a.out-core.h | ||
apic.h | ||
arch_hweight.h | ||
asm-offsets.h | ||
auxvec.h | ||
bugs.h | ||
cache.h | ||
checksum.h | ||
common.lds.S | ||
cputime.h | ||
current.h | ||
delay.h | ||
desc.h | ||
device.h | ||
dma.h | ||
emergency-restart.h | ||
fixmap.h | ||
ftrace.h | ||
futex.h | ||
hardirq.h | ||
hw_irq.h | ||
io.h | ||
irq_regs.h | ||
irq_vectors.h | ||
irq.h | ||
irqflags.h | ||
kdebug.h | ||
kmap_types.h | ||
mmu_context.h | ||
mmu.h | ||
mutex.h | ||
page_offset.h | ||
page.h | ||
param.h | ||
pci.h | ||
pda.h | ||
pgalloc.h | ||
pgtable-2level.h | ||
pgtable-3level.h | ||
pgtable.h | ||
processor-generic.h | ||
ptrace-generic.h | ||
required-features.h | ||
sections.h | ||
segment.h | ||
setup.h | ||
smp.h | ||
system.h | ||
thread_info.h | ||
timex.h | ||
tlb.h | ||
tlbflush.h | ||
topology.h | ||
uaccess.h | ||
xor.h |