forked from luck/tmp_suning_uos_patched
ed943c1fab
This has modules of common directories related to the mpc8272ADS board, mainly common cpm2 changes and fsl_soc.c portions related to the bitbang MDIO and other mechanisms specific for this family. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
800 lines
18 KiB
C
800 lines
18 KiB
C
/*
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* FSL SoC setup code
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* 2006 (c) MontaVista Software, Inc.
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* Vitaly Bordug <vbordug@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/major.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/fsl_devices.h>
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#include <linux/fs_enet_pd.h>
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#include <linux/fs_uart_pd.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/time.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#include <mm/mmu_decl.h>
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#include <asm/cpm2.h>
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extern void init_fcc_ioports(struct fs_platform_info*);
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extern void init_scc_ioports(struct fs_uart_platform_info*);
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static phys_addr_t immrbase = -1;
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phys_addr_t get_immrbase(void)
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{
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struct device_node *soc;
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if (immrbase != -1)
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return immrbase;
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soc = of_find_node_by_type(NULL, "soc");
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if (soc) {
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unsigned int size;
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const void *prop = get_property(soc, "reg", &size);
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if (prop)
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immrbase = of_translate_address(soc, prop);
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of_node_put(soc);
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};
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return immrbase;
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}
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EXPORT_SYMBOL(get_immrbase);
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#ifdef CONFIG_CPM2
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static u32 brgfreq = -1;
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u32 get_brgfreq(void)
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{
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struct device_node *node;
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if (brgfreq != -1)
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return brgfreq;
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node = of_find_node_by_type(NULL, "cpm");
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if (node) {
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unsigned int size;
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const unsigned int *prop = get_property(node, "brg-frequency",
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&size);
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if (prop)
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brgfreq = *prop;
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of_node_put(node);
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};
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return brgfreq;
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}
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EXPORT_SYMBOL(get_brgfreq);
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static u32 fs_baudrate = -1;
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u32 get_baudrate(void)
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{
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struct device_node *node;
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if (fs_baudrate != -1)
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return fs_baudrate;
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node = of_find_node_by_type(NULL, "serial");
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if (node) {
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unsigned int size;
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const unsigned int *prop = get_property(node, "current-speed",
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&size);
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if (prop)
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fs_baudrate = *prop;
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of_node_put(node);
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};
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return fs_baudrate;
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}
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EXPORT_SYMBOL(get_baudrate);
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#endif /* CONFIG_CPM2 */
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static int __init gfar_mdio_of_init(void)
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{
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struct device_node *np;
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unsigned int i;
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struct platform_device *mdio_dev;
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struct resource res;
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int ret;
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for (np = NULL, i = 0;
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(np = of_find_compatible_node(np, "mdio", "gianfar")) != NULL;
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i++) {
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int k;
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struct device_node *child = NULL;
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struct gianfar_mdio_data mdio_data;
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memset(&res, 0, sizeof(res));
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memset(&mdio_data, 0, sizeof(mdio_data));
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ret = of_address_to_resource(np, 0, &res);
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if (ret)
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goto err;
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mdio_dev =
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platform_device_register_simple("fsl-gianfar_mdio",
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res.start, &res, 1);
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if (IS_ERR(mdio_dev)) {
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ret = PTR_ERR(mdio_dev);
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goto err;
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}
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for (k = 0; k < 32; k++)
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mdio_data.irq[k] = -1;
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while ((child = of_get_next_child(np, child)) != NULL) {
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int irq = irq_of_parse_and_map(child, 0);
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if (irq != NO_IRQ) {
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const u32 *id = get_property(child, "reg", NULL);
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mdio_data.irq[*id] = irq;
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}
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}
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ret =
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platform_device_add_data(mdio_dev, &mdio_data,
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sizeof(struct gianfar_mdio_data));
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if (ret)
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goto unreg;
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}
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return 0;
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unreg:
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platform_device_unregister(mdio_dev);
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err:
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return ret;
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}
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arch_initcall(gfar_mdio_of_init);
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static const char *gfar_tx_intr = "tx";
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static const char *gfar_rx_intr = "rx";
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static const char *gfar_err_intr = "error";
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static int __init gfar_of_init(void)
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{
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struct device_node *np;
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unsigned int i;
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struct platform_device *gfar_dev;
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struct resource res;
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int ret;
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for (np = NULL, i = 0;
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(np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
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i++) {
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struct resource r[4];
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struct device_node *phy, *mdio;
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struct gianfar_platform_data gfar_data;
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const unsigned int *id;
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const char *model;
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const void *mac_addr;
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const phandle *ph;
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int n_res = 2;
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memset(r, 0, sizeof(r));
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memset(&gfar_data, 0, sizeof(gfar_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto err;
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r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
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r[1].flags = IORESOURCE_IRQ;
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model = get_property(np, "model", NULL);
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/* If we aren't the FEC we have multiple interrupts */
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if (model && strcasecmp(model, "FEC")) {
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r[1].name = gfar_tx_intr;
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r[2].name = gfar_rx_intr;
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r[2].start = r[2].end = irq_of_parse_and_map(np, 1);
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r[2].flags = IORESOURCE_IRQ;
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r[3].name = gfar_err_intr;
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r[3].start = r[3].end = irq_of_parse_and_map(np, 2);
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r[3].flags = IORESOURCE_IRQ;
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n_res += 2;
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}
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gfar_dev =
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platform_device_register_simple("fsl-gianfar", i, &r[0],
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n_res);
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if (IS_ERR(gfar_dev)) {
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ret = PTR_ERR(gfar_dev);
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goto err;
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}
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mac_addr = get_property(np, "local-mac-address", NULL);
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if (mac_addr == NULL)
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mac_addr = get_property(np, "mac-address", NULL);
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if (mac_addr == NULL) {
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/* Obsolete */
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mac_addr = get_property(np, "address", NULL);
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}
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if (mac_addr)
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memcpy(gfar_data.mac_addr, mac_addr, 6);
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if (model && !strcasecmp(model, "TSEC"))
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gfar_data.device_flags =
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FSL_GIANFAR_DEV_HAS_GIGABIT |
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FSL_GIANFAR_DEV_HAS_COALESCE |
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FSL_GIANFAR_DEV_HAS_RMON |
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FSL_GIANFAR_DEV_HAS_MULTI_INTR;
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if (model && !strcasecmp(model, "eTSEC"))
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gfar_data.device_flags =
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FSL_GIANFAR_DEV_HAS_GIGABIT |
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FSL_GIANFAR_DEV_HAS_COALESCE |
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FSL_GIANFAR_DEV_HAS_RMON |
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FSL_GIANFAR_DEV_HAS_MULTI_INTR |
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FSL_GIANFAR_DEV_HAS_CSUM |
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FSL_GIANFAR_DEV_HAS_VLAN |
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FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
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ph = get_property(np, "phy-handle", NULL);
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phy = of_find_node_by_phandle(*ph);
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if (phy == NULL) {
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ret = -ENODEV;
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goto unreg;
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}
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mdio = of_get_parent(phy);
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id = get_property(phy, "reg", NULL);
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ret = of_address_to_resource(mdio, 0, &res);
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if (ret) {
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of_node_put(phy);
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of_node_put(mdio);
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goto unreg;
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}
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gfar_data.phy_id = *id;
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gfar_data.bus_id = res.start;
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of_node_put(phy);
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of_node_put(mdio);
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ret =
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platform_device_add_data(gfar_dev, &gfar_data,
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sizeof(struct
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gianfar_platform_data));
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if (ret)
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goto unreg;
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}
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return 0;
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unreg:
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platform_device_unregister(gfar_dev);
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err:
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return ret;
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}
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arch_initcall(gfar_of_init);
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static int __init fsl_i2c_of_init(void)
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{
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struct device_node *np;
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unsigned int i;
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struct platform_device *i2c_dev;
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int ret;
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for (np = NULL, i = 0;
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(np = of_find_compatible_node(np, "i2c", "fsl-i2c")) != NULL;
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i++) {
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struct resource r[2];
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struct fsl_i2c_platform_data i2c_data;
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const unsigned char *flags = NULL;
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memset(&r, 0, sizeof(r));
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memset(&i2c_data, 0, sizeof(i2c_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto err;
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r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
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r[1].flags = IORESOURCE_IRQ;
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i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
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if (IS_ERR(i2c_dev)) {
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ret = PTR_ERR(i2c_dev);
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goto err;
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}
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i2c_data.device_flags = 0;
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flags = get_property(np, "dfsrr", NULL);
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if (flags)
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i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
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flags = get_property(np, "fsl5200-clocking", NULL);
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if (flags)
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i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
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ret =
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platform_device_add_data(i2c_dev, &i2c_data,
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sizeof(struct
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fsl_i2c_platform_data));
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if (ret)
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goto unreg;
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}
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return 0;
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unreg:
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platform_device_unregister(i2c_dev);
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err:
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return ret;
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}
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arch_initcall(fsl_i2c_of_init);
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#ifdef CONFIG_PPC_83xx
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static int __init mpc83xx_wdt_init(void)
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{
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struct resource r;
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struct device_node *soc, *np;
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struct platform_device *dev;
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const unsigned int *freq;
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int ret;
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np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
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if (!np) {
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ret = -ENODEV;
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goto nodev;
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}
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soc = of_find_node_by_type(NULL, "soc");
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if (!soc) {
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ret = -ENODEV;
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goto nosoc;
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}
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freq = get_property(soc, "bus-frequency", NULL);
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if (!freq) {
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ret = -ENODEV;
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goto err;
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}
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memset(&r, 0, sizeof(r));
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ret = of_address_to_resource(np, 0, &r);
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if (ret)
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goto err;
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dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
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if (IS_ERR(dev)) {
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ret = PTR_ERR(dev);
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goto err;
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}
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ret = platform_device_add_data(dev, freq, sizeof(int));
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if (ret)
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goto unreg;
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of_node_put(soc);
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of_node_put(np);
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return 0;
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unreg:
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platform_device_unregister(dev);
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err:
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of_node_put(soc);
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nosoc:
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of_node_put(np);
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nodev:
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return ret;
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}
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arch_initcall(mpc83xx_wdt_init);
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#endif
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static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
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{
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if (!phy_type)
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return FSL_USB2_PHY_NONE;
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if (!strcasecmp(phy_type, "ulpi"))
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return FSL_USB2_PHY_ULPI;
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if (!strcasecmp(phy_type, "utmi"))
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return FSL_USB2_PHY_UTMI;
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if (!strcasecmp(phy_type, "utmi_wide"))
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return FSL_USB2_PHY_UTMI_WIDE;
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if (!strcasecmp(phy_type, "serial"))
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return FSL_USB2_PHY_SERIAL;
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return FSL_USB2_PHY_NONE;
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}
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static int __init fsl_usb_of_init(void)
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{
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struct device_node *np;
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unsigned int i;
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struct platform_device *usb_dev_mph = NULL, *usb_dev_dr = NULL;
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int ret;
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for (np = NULL, i = 0;
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(np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL;
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i++) {
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struct resource r[2];
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struct fsl_usb2_platform_data usb_data;
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const unsigned char *prop = NULL;
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memset(&r, 0, sizeof(r));
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memset(&usb_data, 0, sizeof(usb_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto err;
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r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
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r[1].flags = IORESOURCE_IRQ;
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usb_dev_mph =
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platform_device_register_simple("fsl-ehci", i, r, 2);
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if (IS_ERR(usb_dev_mph)) {
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ret = PTR_ERR(usb_dev_mph);
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goto err;
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}
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usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
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usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
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usb_data.operating_mode = FSL_USB2_MPH_HOST;
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prop = get_property(np, "port0", NULL);
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if (prop)
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usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
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prop = get_property(np, "port1", NULL);
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if (prop)
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usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
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prop = get_property(np, "phy_type", NULL);
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usb_data.phy_mode = determine_usb_phy(prop);
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ret =
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platform_device_add_data(usb_dev_mph, &usb_data,
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sizeof(struct
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fsl_usb2_platform_data));
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if (ret)
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goto unreg_mph;
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}
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for (np = NULL;
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(np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL;
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i++) {
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struct resource r[2];
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struct fsl_usb2_platform_data usb_data;
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const unsigned char *prop = NULL;
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memset(&r, 0, sizeof(r));
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memset(&usb_data, 0, sizeof(usb_data));
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ret = of_address_to_resource(np, 0, &r[0]);
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if (ret)
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goto unreg_mph;
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r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
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r[1].flags = IORESOURCE_IRQ;
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usb_dev_dr =
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platform_device_register_simple("fsl-ehci", i, r, 2);
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if (IS_ERR(usb_dev_dr)) {
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ret = PTR_ERR(usb_dev_dr);
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goto err;
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}
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usb_dev_dr->dev.coherent_dma_mask = 0xffffffffUL;
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usb_dev_dr->dev.dma_mask = &usb_dev_dr->dev.coherent_dma_mask;
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usb_data.operating_mode = FSL_USB2_DR_HOST;
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prop = get_property(np, "phy_type", NULL);
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usb_data.phy_mode = determine_usb_phy(prop);
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ret =
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platform_device_add_data(usb_dev_dr, &usb_data,
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|
sizeof(struct
|
|
fsl_usb2_platform_data));
|
|
if (ret)
|
|
goto unreg_dr;
|
|
}
|
|
return 0;
|
|
|
|
unreg_dr:
|
|
if (usb_dev_dr)
|
|
platform_device_unregister(usb_dev_dr);
|
|
unreg_mph:
|
|
if (usb_dev_mph)
|
|
platform_device_unregister(usb_dev_mph);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
arch_initcall(fsl_usb_of_init);
|
|
|
|
#ifdef CONFIG_CPM2
|
|
|
|
static const char fcc_regs[] = "fcc_regs";
|
|
static const char fcc_regs_c[] = "fcc_regs_c";
|
|
static const char fcc_pram[] = "fcc_pram";
|
|
static char bus_id[9][BUS_ID_SIZE];
|
|
|
|
static int __init fs_enet_of_init(void)
|
|
{
|
|
struct device_node *np;
|
|
unsigned int i;
|
|
struct platform_device *fs_enet_dev;
|
|
struct resource res;
|
|
int ret;
|
|
|
|
for (np = NULL, i = 0;
|
|
(np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
|
|
i++) {
|
|
struct resource r[4];
|
|
struct device_node *phy, *mdio;
|
|
struct fs_platform_info fs_enet_data;
|
|
const unsigned int *id, *phy_addr, phy_irq;
|
|
const void *mac_addr;
|
|
const phandle *ph;
|
|
const char *model;
|
|
|
|
memset(r, 0, sizeof(r));
|
|
memset(&fs_enet_data, 0, sizeof(fs_enet_data));
|
|
|
|
ret = of_address_to_resource(np, 0, &r[0]);
|
|
if (ret)
|
|
goto err;
|
|
r[0].name = fcc_regs;
|
|
|
|
ret = of_address_to_resource(np, 1, &r[1]);
|
|
if (ret)
|
|
goto err;
|
|
r[1].name = fcc_pram;
|
|
|
|
ret = of_address_to_resource(np, 2, &r[2]);
|
|
if (ret)
|
|
goto err;
|
|
r[2].name = fcc_regs_c;
|
|
fs_enet_data.fcc_regs_c = r[2].start;
|
|
|
|
r[3].start = r[3].end = irq_of_parse_and_map(np, 0);
|
|
r[3].flags = IORESOURCE_IRQ;
|
|
|
|
fs_enet_dev =
|
|
platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
|
|
|
|
if (IS_ERR(fs_enet_dev)) {
|
|
ret = PTR_ERR(fs_enet_dev);
|
|
goto err;
|
|
}
|
|
|
|
model = get_property(np, "model", NULL);
|
|
if (model == NULL) {
|
|
ret = -ENODEV;
|
|
goto unreg;
|
|
}
|
|
|
|
mac_addr = get_property(np, "mac-address", NULL);
|
|
memcpy(fs_enet_data.macaddr, mac_addr, 6);
|
|
|
|
ph = get_property(np, "phy-handle", NULL);
|
|
phy = of_find_node_by_phandle(*ph);
|
|
|
|
if (phy == NULL) {
|
|
ret = -ENODEV;
|
|
goto unreg;
|
|
}
|
|
|
|
phy_addr = get_property(phy, "reg", NULL);
|
|
fs_enet_data.phy_addr = *phy_addr;
|
|
|
|
phy_irq = get_property(phy, "interrupts", NULL);
|
|
|
|
id = get_property(np, "device-id", NULL);
|
|
fs_enet_data.fs_no = *id;
|
|
strcpy(fs_enet_data.fs_type, model);
|
|
|
|
mdio = of_get_parent(phy);
|
|
ret = of_address_to_resource(mdio, 0, &res);
|
|
if (ret) {
|
|
of_node_put(phy);
|
|
of_node_put(mdio);
|
|
goto unreg;
|
|
}
|
|
|
|
fs_enet_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL));
|
|
fs_enet_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL));
|
|
|
|
if (strstr(model, "FCC")) {
|
|
int fcc_index = *id - 1;
|
|
unsigned char* mdio_bb_prop;
|
|
|
|
fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
|
|
fs_enet_data.rx_ring = 32;
|
|
fs_enet_data.tx_ring = 32;
|
|
fs_enet_data.rx_copybreak = 240;
|
|
fs_enet_data.use_napi = 0;
|
|
fs_enet_data.napi_weight = 17;
|
|
fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
|
|
fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
|
|
fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
|
|
|
|
snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
|
|
(u32)res.start, fs_enet_data.phy_addr);
|
|
fs_enet_data.bus_id = (char*)&bus_id[(*id)];
|
|
fs_enet_data.init_ioports = init_fcc_ioports;
|
|
|
|
mdio_bb_prop = get_property(phy, "bitbang", NULL);
|
|
if (mdio_bb_prop) {
|
|
struct platform_device *fs_enet_mdio_bb_dev;
|
|
struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
|
|
|
|
fs_enet_mdio_bb_dev =
|
|
platform_device_register_simple("fsl-bb-mdio",
|
|
i, NULL, 0);
|
|
memset(&fs_enet_mdio_bb_data, 0,
|
|
sizeof(struct fs_mii_bb_platform_info));
|
|
fs_enet_mdio_bb_data.mdio_dat.bit =
|
|
mdio_bb_prop[0];
|
|
fs_enet_mdio_bb_data.mdio_dir.bit =
|
|
mdio_bb_prop[1];
|
|
fs_enet_mdio_bb_data.mdc_dat.bit =
|
|
mdio_bb_prop[2];
|
|
fs_enet_mdio_bb_data.mdio_port =
|
|
mdio_bb_prop[3];
|
|
fs_enet_mdio_bb_data.mdc_port =
|
|
mdio_bb_prop[4];
|
|
fs_enet_mdio_bb_data.delay =
|
|
mdio_bb_prop[5];
|
|
|
|
fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
|
|
fs_enet_mdio_bb_data.irq[1] = -1;
|
|
fs_enet_mdio_bb_data.irq[2] = -1;
|
|
fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
|
|
fs_enet_mdio_bb_data.irq[31] = -1;
|
|
|
|
fs_enet_mdio_bb_data.mdio_dat.offset =
|
|
(u32)&cpm2_immr->im_ioport.iop_pdatc;
|
|
fs_enet_mdio_bb_data.mdio_dir.offset =
|
|
(u32)&cpm2_immr->im_ioport.iop_pdirc;
|
|
fs_enet_mdio_bb_data.mdc_dat.offset =
|
|
(u32)&cpm2_immr->im_ioport.iop_pdatc;
|
|
|
|
ret = platform_device_add_data(
|
|
fs_enet_mdio_bb_dev,
|
|
&fs_enet_mdio_bb_data,
|
|
sizeof(struct fs_mii_bb_platform_info));
|
|
if (ret)
|
|
goto unreg;
|
|
}
|
|
|
|
of_node_put(phy);
|
|
of_node_put(mdio);
|
|
|
|
ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
|
|
sizeof(struct
|
|
fs_platform_info));
|
|
if (ret)
|
|
goto unreg;
|
|
}
|
|
return 0;
|
|
|
|
unreg:
|
|
platform_device_unregister(fs_enet_dev);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
arch_initcall(fs_enet_of_init);
|
|
|
|
static const char scc_regs[] = "regs";
|
|
static const char scc_pram[] = "pram";
|
|
|
|
static int __init cpm_uart_of_init(void)
|
|
{
|
|
struct device_node *np;
|
|
unsigned int i;
|
|
struct platform_device *cpm_uart_dev;
|
|
int ret;
|
|
|
|
for (np = NULL, i = 0;
|
|
(np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
|
|
i++) {
|
|
struct resource r[3];
|
|
struct fs_uart_platform_info cpm_uart_data;
|
|
const int *id;
|
|
const char *model;
|
|
|
|
memset(r, 0, sizeof(r));
|
|
memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
|
|
|
|
ret = of_address_to_resource(np, 0, &r[0]);
|
|
if (ret)
|
|
goto err;
|
|
|
|
r[0].name = scc_regs;
|
|
|
|
ret = of_address_to_resource(np, 1, &r[1]);
|
|
if (ret)
|
|
goto err;
|
|
r[1].name = scc_pram;
|
|
|
|
r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
|
|
r[2].flags = IORESOURCE_IRQ;
|
|
|
|
cpm_uart_dev =
|
|
platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
|
|
|
|
if (IS_ERR(cpm_uart_dev)) {
|
|
ret = PTR_ERR(cpm_uart_dev);
|
|
goto err;
|
|
}
|
|
|
|
id = get_property(np, "device-id", NULL);
|
|
cpm_uart_data.fs_no = *id;
|
|
|
|
model = (char*)get_property(np, "model", NULL);
|
|
strcpy(cpm_uart_data.fs_type, model);
|
|
|
|
cpm_uart_data.uart_clk = ppc_proc_freq;
|
|
|
|
cpm_uart_data.tx_num_fifo = 4;
|
|
cpm_uart_data.tx_buf_size = 32;
|
|
cpm_uart_data.rx_num_fifo = 4;
|
|
cpm_uart_data.rx_buf_size = 32;
|
|
cpm_uart_data.clk_rx = *((u32 *) get_property(np, "rx-clock", NULL));
|
|
cpm_uart_data.clk_tx = *((u32 *) get_property(np, "tx-clock", NULL));
|
|
|
|
ret =
|
|
platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
|
|
sizeof(struct
|
|
fs_uart_platform_info));
|
|
if (ret)
|
|
goto unreg;
|
|
}
|
|
|
|
return 0;
|
|
|
|
unreg:
|
|
platform_device_unregister(cpm_uart_dev);
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
arch_initcall(cpm_uart_of_init);
|
|
#endif /* CONFIG_CPM2 */
|