Manivannan Sadhasivam c66cc04043 PCI: pciehp: Add Qualcomm quirk for Command Completed erratum ... [ Upstream commit 9f72d4757cbe4d1ed669192f6d23817c9e437c4b ] The Qualcomm PCI bridge device (Device ID 0x0110) found in chipsets such as SM8450 does not set the Command Completed bit unless writes to the Slot Command register change "Control" bits. This results in timeouts like below: pcieport 0001:00:00.0: pciehp: Timeout on hotplug command 0x03c0 (issued 2020 msec ago) Add the device to the Command Completed quirk to mark commands "completed" immediately unless they change the "Control" bits. Link: https://lore.kernel.org/r/20220210145003.135907-1-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-04-13 21:00:57 +02:00
..
acpi_pcihp.c
acpiphp_core.c
acpiphp_glue.c
acpiphp_ibm.c
acpiphp.h
cpci_hotplug_core.c
cpci_hotplug_pci.c
cpci_hotplug.h
cpcihp_generic.c
cpcihp_zt5550.c
cpcihp_zt5550.h
cpqphp_core.c
cpqphp_ctrl.c
cpqphp_nvram.c
cpqphp_nvram.h
cpqphp_pci.c
cpqphp_sysfs.c
cpqphp.h
ibmphp_core.c
ibmphp_ebda.c
ibmphp_hpc.c
ibmphp_pci.c
ibmphp_res.c
ibmphp.h
Kconfig
Makefile
pci_hotplug_core.c
pciehp_core.c	PCI: pciehp: Use down_read/write_nested(reset_lock) to fix lockdep errors	2022-01-27 10:54:26 +01:00
pciehp_ctrl.c
pciehp_hpc.c	PCI: pciehp: Add Qualcomm quirk for Command Completed erratum	2022-04-13 21:00:57 +02:00
pciehp_pci.c
pciehp.h	PCI: pciehp: Use down_read/write_nested(reset_lock) to fix lockdep errors	2022-01-27 10:54:26 +01:00
pnv_php.c
rpadlpar_core.c
rpadlpar_sysfs.c
rpadlpar.h
rpaphp_core.c
rpaphp_pci.c
rpaphp_slot.c
rpaphp.h
s390_pci_hpc.c	s390/pci: fix zpci_zdev_put() on reserve	2021-10-27 09:56:56 +02:00
shpchp_core.c
shpchp_ctrl.c
shpchp_hpc.c
shpchp_pci.c
shpchp_sysfs.c
shpchp.h
TODO