forked from luck/tmp_suning_uos_patched
5afe18d2f5
The 32-bit parameters (len and csum) of csum_ipv6_magic() are passed in 64-bit registers in2 and in4. The high order 32 bits of the registers were never cleared, and garbage was sometimes calculated into the checksum. Fix this by clearing the high order 32 bits of these registers. Signed-off-by: Jiri Bohac <jbohac@suse.cz> Signed-off-by: Tony Luck <tony.luck@intel.com>
145 lines
2.6 KiB
ArmAsm
145 lines
2.6 KiB
ArmAsm
/*
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* Optmized version of the ip_fast_csum() function
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* Used for calculating IP header checksum
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*
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* Return: 16bit checksum, complemented
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*
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* Inputs:
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* in0: address of buffer to checksum (char *)
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* in1: length of the buffer (int)
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*
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* Copyright (C) 2002, 2006 Intel Corp.
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* Copyright (C) 2002, 2006 Ken Chen <kenneth.w.chen@intel.com>
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*/
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#include <asm/asmmacro.h>
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/*
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* Since we know that most likely this function is called with buf aligned
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* on 4-byte boundary and 20 bytes in length, we can execution rather quickly
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* versus calling generic version of do_csum, which has lots of overhead in
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* handling various alignments and sizes. However, due to lack of constrains
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* put on the function input argument, cases with alignment not on 4-byte or
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* size not equal to 20 bytes will be handled by the generic do_csum function.
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*/
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#define in0 r32
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#define in1 r33
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#define in2 r34
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#define in3 r35
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#define in4 r36
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#define ret0 r8
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GLOBAL_ENTRY(ip_fast_csum)
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.prologue
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.body
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cmp.ne p6,p7=5,in1 // size other than 20 byte?
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and r14=3,in0 // is it aligned on 4-byte?
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add r15=4,in0 // second source pointer
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;;
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cmp.ne.or.andcm p6,p7=r14,r0
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;;
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(p7) ld4 r20=[in0],8
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(p7) ld4 r21=[r15],8
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(p6) br.spnt .generic
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;;
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ld4 r22=[in0],8
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ld4 r23=[r15],8
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;;
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ld4 r24=[in0]
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add r20=r20,r21
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add r22=r22,r23
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;;
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add r20=r20,r22
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;;
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add r20=r20,r24
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;;
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shr.u ret0=r20,16 // now need to add the carry
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zxt2 r20=r20
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;;
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add r20=ret0,r20
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;;
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shr.u ret0=r20,16 // add carry again
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zxt2 r20=r20
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;;
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add r20=ret0,r20
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;;
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shr.u ret0=r20,16
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zxt2 r20=r20
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;;
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add r20=ret0,r20
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mov r9=0xffff
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;;
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andcm ret0=r9,r20
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.restore sp // reset frame state
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br.ret.sptk.many b0
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;;
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.generic:
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.prologue
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.save ar.pfs, r35
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alloc r35=ar.pfs,2,2,2,0
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.save rp, r34
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mov r34=b0
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.body
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dep.z out1=in1,2,30
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mov out0=in0
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;;
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br.call.sptk.many b0=do_csum
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;;
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andcm ret0=-1,ret0
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mov ar.pfs=r35
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mov b0=r34
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br.ret.sptk.many b0
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END(ip_fast_csum)
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GLOBAL_ENTRY(csum_ipv6_magic)
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ld4 r20=[in0],4
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ld4 r21=[in1],4
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zxt4 in2=in2
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;;
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ld4 r22=[in0],4
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ld4 r23=[in1],4
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dep r15=in3,in2,32,16
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;;
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ld4 r24=[in0],4
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ld4 r25=[in1],4
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mux1 r15=r15,@rev
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add r16=r20,r21
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add r17=r22,r23
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zxt4 in4=in4
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;;
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ld4 r26=[in0],4
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ld4 r27=[in1],4
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shr.u r15=r15,16
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add r18=r24,r25
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add r8=r16,r17
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;;
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add r19=r26,r27
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add r8=r8,r18
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;;
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add r8=r8,r19
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add r15=r15,in4
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;;
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add r8=r8,r15
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;;
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shr.u r10=r8,32 // now fold sum into short
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zxt4 r11=r8
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;;
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add r8=r10,r11
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;;
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shr.u r10=r8,16 // yeah, keep it rolling
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zxt2 r11=r8
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;;
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add r8=r10,r11
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;;
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shr.u r10=r8,16 // three times lucky
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zxt2 r11=r8
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;;
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add r8=r10,r11
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mov r9=0xffff
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;;
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andcm r8=r9,r8
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br.ret.sptk.many b0
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END(csum_ipv6_magic)
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