forked from luck/tmp_suning_uos_patched
c1d1c5d421
This patch add support for the bcma bus. Broadcom uses only Mips 74K CPUs on the new SoC and on the old ons using ssb bus there are no Mips 74K CPUs. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
61 lines
2.0 KiB
C
61 lines
2.0 KiB
C
/*
|
|
* Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
|
|
*
|
|
* This program is free software; you can redistribute it and/or modify it
|
|
* under the terms of the GNU General Public License as published by the
|
|
* Free Software Foundation; either version 2 of the License, or (at your
|
|
* option) any later version.
|
|
*
|
|
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
|
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
|
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
|
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
|
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
*
|
|
* You should have received a copy of the GNU General Public License along
|
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
|
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
|
*/
|
|
|
|
|
|
#include <linux/init.h>
|
|
#include <linux/ssb/ssb.h>
|
|
#include <asm/time.h>
|
|
#include <bcm47xx.h>
|
|
|
|
void __init plat_time_init(void)
|
|
{
|
|
unsigned long hz = 0;
|
|
|
|
/*
|
|
* Use deterministic values for initial counter interrupt
|
|
* so that calibrate delay avoids encountering a counter wrap.
|
|
*/
|
|
write_c0_count(0);
|
|
write_c0_compare(0xffff);
|
|
|
|
switch (bcm47xx_bus_type) {
|
|
#ifdef CONFIG_BCM47XX_SSB
|
|
case BCM47XX_BUS_TYPE_SSB:
|
|
hz = ssb_cpu_clock(&bcm47xx_bus.ssb.mipscore) / 2;
|
|
break;
|
|
#endif
|
|
#ifdef CONFIG_BCM47XX_BCMA
|
|
case BCM47XX_BUS_TYPE_BCMA:
|
|
hz = bcma_cpu_clock(&bcm47xx_bus.bcma.bus.drv_mips) / 2;
|
|
break;
|
|
#endif
|
|
}
|
|
|
|
if (!hz)
|
|
hz = 100000000;
|
|
|
|
/* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
|
|
mips_hpt_frequency = hz;
|
|
}
|