forked from luck/tmp_suning_uos_patched
82b0a434b4
In the add-on file for the GIC dealing with the RealView family we currently only handle the PB11MPCore, let's extend this to manage the RealView EB ARM11MPCore as well. The Revision B of the ARM11MPCore core tile is a bit special and needs special handling as it moves a system control register around at random. Cc: Arnd Bergmann <arnd@arndb.de> Cc: devicetree@vger.kernel.org Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
76 lines
2.2 KiB
C
76 lines
2.2 KiB
C
/*
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* Special GIC quirks for the ARM RealView
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* Copyright (C) 2015 Linus Walleij
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*/
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#include <linux/of.h>
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#include <linux/regmap.h>
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#include <linux/mfd/syscon.h>
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#include <linux/bitops.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/arm-gic.h>
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#define REALVIEW_SYS_LOCK_OFFSET 0x20
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#define REALVIEW_SYS_PLD_CTRL1 0x74
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#define REALVIEW_EB_REVB_SYS_PLD_CTRL1 0xD8
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#define VERSATILE_LOCK_VAL 0xA05F
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#define PLD_INTMODE_MASK BIT(22)|BIT(23)|BIT(24)
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#define PLD_INTMODE_LEGACY 0x0
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#define PLD_INTMODE_NEW_DCC BIT(22)
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#define PLD_INTMODE_NEW_NO_DCC BIT(23)
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#define PLD_INTMODE_FIQ_ENABLE BIT(24)
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/* For some reason RealView EB Rev B moved this register */
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static const struct of_device_id syscon_pldset_of_match[] = {
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{
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.compatible = "arm,realview-eb11mp-revb-syscon",
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.data = (void *)REALVIEW_EB_REVB_SYS_PLD_CTRL1,
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},
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{
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.compatible = "arm,realview-eb11mp-revc-syscon",
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.data = (void *)REALVIEW_SYS_PLD_CTRL1,
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},
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{
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.compatible = "arm,realview-eb-syscon",
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.data = (void *)REALVIEW_SYS_PLD_CTRL1,
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},
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{
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.compatible = "arm,realview-pb11mp-syscon",
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.data = (void *)REALVIEW_SYS_PLD_CTRL1,
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},
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{},
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};
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static int __init
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realview_gic_of_init(struct device_node *node, struct device_node *parent)
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{
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static struct regmap *map;
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struct device_node *np;
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const struct of_device_id *gic_id;
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u32 pld1_ctrl;
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np = of_find_matching_node_and_match(NULL, syscon_pldset_of_match,
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&gic_id);
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if (!np)
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return -ENODEV;
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pld1_ctrl = (u32)gic_id->data;
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/* The PB11MPCore GIC needs to be configured in the syscon */
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map = syscon_node_to_regmap(np);
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if (!IS_ERR(map)) {
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/* new irq mode with no DCC */
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regmap_write(map, REALVIEW_SYS_LOCK_OFFSET,
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VERSATILE_LOCK_VAL);
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regmap_update_bits(map, pld1_ctrl,
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PLD_INTMODE_NEW_NO_DCC,
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PLD_INTMODE_MASK);
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regmap_write(map, REALVIEW_SYS_LOCK_OFFSET, 0x0000);
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pr_info("RealView GIC: set up interrupt controller to NEW mode, no DCC\n");
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} else {
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pr_err("RealView GIC setup: could not find syscon\n");
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return -ENODEV;
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}
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return gic_of_init(node, parent);
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}
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IRQCHIP_DECLARE(armtc11mp_gic, "arm,tc11mp-gic", realview_gic_of_init);
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IRQCHIP_DECLARE(armeb11mp_gic, "arm,eb11mp-gic", realview_gic_of_init);
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