forked from luck/tmp_suning_uos_patched
e8d235d4d8
Add support for NXP's LPC18xx (Cortex-M3) and LPC43xx (Cortex-M4) SoCs. These SoCs are NXP's high preformance MCU line and can run at clock speeds up to 180 MHz for LPC18xx and 204 MHz for LPC43xx. LPC43xx is more or less a LPC18xx with a Cortex-M4F core and a few extra peripherals. The LPC43xx series also features one or two Cortex-M0 cores that can be used to offload the main M4 core. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
23 lines
566 B
C
23 lines
566 B
C
/*
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* Device Tree board file for NXP LPC18xx/43xx
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*
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* Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <asm/mach/arch.h>
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static const char *const lpc18xx_43xx_compat[] __initconst = {
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"nxp,lpc1850",
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"nxp,lpc4350",
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"nxp,lpc4370",
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NULL
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};
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DT_MACHINE_START(LPC18XXDT, "NXP LPC18xx/43xx (Device Tree)")
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.dt_compat = lpc18xx_43xx_compat,
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MACHINE_END
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