forked from luck/tmp_suning_uos_patched
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
550 lines
15 KiB
C
550 lines
15 KiB
C
/*
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* linux/arch/arm/mach-omap/common.c
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*
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* Code common to all OMAP machines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/console.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_reg.h>
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#include <asm/hardware.h>
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#include <asm/system.h>
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#include <asm/pgtable.h>
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#include <asm/mach/map.h>
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#include <asm/hardware/clock.h>
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#include <asm/io.h>
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#include <asm/mach-types.h>
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#include <asm/arch/board.h>
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#include <asm/arch/mux.h>
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#include <asm/arch/fpga.h>
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#include "clock.h"
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#define DEBUG 1
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struct omap_id {
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u16 jtag_id; /* Used to determine OMAP type */
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u8 die_rev; /* Processor revision */
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u32 omap_id; /* OMAP revision */
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u32 type; /* Cpu id bits [31:08], cpu class bits [07:00] */
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};
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/* Register values to detect the OMAP version */
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static struct omap_id omap_ids[] __initdata = {
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{ .jtag_id = 0x355f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300100},
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{ .jtag_id = 0xb55f, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x07300300},
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{ .jtag_id = 0xb470, .die_rev = 0x0, .omap_id = 0x03310100, .type = 0x15100000},
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{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320000, .type = 0x16100000},
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{ .jtag_id = 0xb576, .die_rev = 0x2, .omap_id = 0x03320100, .type = 0x16110000},
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{ .jtag_id = 0xb576, .die_rev = 0x3, .omap_id = 0x03320100, .type = 0x16100c00},
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{ .jtag_id = 0xb576, .die_rev = 0x0, .omap_id = 0x03320200, .type = 0x16100d00},
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{ .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
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{ .jtag_id = 0xb613, .die_rev = 0x0, .omap_id = 0x03320300, .type = 0x1610ef00},
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{ .jtag_id = 0xb576, .die_rev = 0x1, .omap_id = 0x03320100, .type = 0x16110000},
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{ .jtag_id = 0xb58c, .die_rev = 0x2, .omap_id = 0x03320200, .type = 0x16110b00},
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{ .jtag_id = 0xb58c, .die_rev = 0x3, .omap_id = 0x03320200, .type = 0x16110c00},
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{ .jtag_id = 0xb65f, .die_rev = 0x0, .omap_id = 0x03320400, .type = 0x16212300},
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{ .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320400, .type = 0x16212300},
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{ .jtag_id = 0xb65f, .die_rev = 0x1, .omap_id = 0x03320500, .type = 0x16212300},
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{ .jtag_id = 0xb5f7, .die_rev = 0x0, .omap_id = 0x03330000, .type = 0x17100000},
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{ .jtag_id = 0xb5f7, .die_rev = 0x1, .omap_id = 0x03330100, .type = 0x17100000},
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{ .jtag_id = 0xb5f7, .die_rev = 0x2, .omap_id = 0x03330100, .type = 0x17100000},
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};
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/*
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* Get OMAP type from PROD_ID.
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* 1710 has the PROD_ID in bits 15:00, not in 16:01 as documented in TRM.
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* 1510 PROD_ID is empty, and 1610 PROD_ID does not make sense.
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* Undocumented register in TEST BLOCK is used as fallback; This seems to
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* work on 1510, 1610 & 1710. The official way hopefully will work in future
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* processors.
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*/
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static u16 __init omap_get_jtag_id(void)
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{
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u32 prod_id, omap_id;
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prod_id = omap_readl(OMAP_PRODUCTION_ID_1);
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omap_id = omap_readl(OMAP32_ID_1);
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/* Check for unusable OMAP_PRODUCTION_ID_1 on 1611B/5912 and 730 */
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if (((prod_id >> 20) == 0) || (prod_id == omap_id))
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prod_id = 0;
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else
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prod_id &= 0xffff;
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if (prod_id)
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return prod_id;
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/* Use OMAP32_ID_1 as fallback */
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prod_id = ((omap_id >> 12) & 0xffff);
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return prod_id;
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}
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/*
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* Get OMAP revision from DIE_REV.
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* Early 1710 processors may have broken OMAP_DIE_ID, it contains PROD_ID.
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* Undocumented register in the TEST BLOCK is used as fallback.
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* REVISIT: This does not seem to work on 1510
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*/
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static u8 __init omap_get_die_rev(void)
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{
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u32 die_rev;
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die_rev = omap_readl(OMAP_DIE_ID_1);
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/* Check for broken OMAP_DIE_ID on early 1710 */
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if (((die_rev >> 12) & 0xffff) == omap_get_jtag_id())
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die_rev = 0;
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die_rev = (die_rev >> 17) & 0xf;
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if (die_rev)
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return die_rev;
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die_rev = (omap_readl(OMAP32_ID_1) >> 28) & 0xf;
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return die_rev;
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}
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static void __init omap_check_revision(void)
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{
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int i;
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u16 jtag_id;
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u8 die_rev;
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u32 omap_id;
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u8 cpu_type;
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jtag_id = omap_get_jtag_id();
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die_rev = omap_get_die_rev();
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omap_id = omap_readl(OMAP32_ID_0);
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#ifdef DEBUG
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printk("OMAP_DIE_ID_0: 0x%08x\n", omap_readl(OMAP_DIE_ID_0));
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printk("OMAP_DIE_ID_1: 0x%08x DIE_REV: %i\n",
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omap_readl(OMAP_DIE_ID_1),
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(omap_readl(OMAP_DIE_ID_1) >> 17) & 0xf);
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printk("OMAP_PRODUCTION_ID_0: 0x%08x\n", omap_readl(OMAP_PRODUCTION_ID_0));
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printk("OMAP_PRODUCTION_ID_1: 0x%08x JTAG_ID: 0x%04x\n",
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omap_readl(OMAP_PRODUCTION_ID_1),
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omap_readl(OMAP_PRODUCTION_ID_1) & 0xffff);
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printk("OMAP32_ID_0: 0x%08x\n", omap_readl(OMAP32_ID_0));
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printk("OMAP32_ID_1: 0x%08x\n", omap_readl(OMAP32_ID_1));
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printk("JTAG_ID: 0x%04x DIE_REV: %i\n", jtag_id, die_rev);
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#endif
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system_serial_high = omap_readl(OMAP_DIE_ID_0);
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system_serial_low = omap_readl(OMAP_DIE_ID_1);
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/* First check only the major version in a safe way */
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for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
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if (jtag_id == (omap_ids[i].jtag_id)) {
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system_rev = omap_ids[i].type;
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break;
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}
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}
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/* Check if we can find the die revision */
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for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
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if (jtag_id == omap_ids[i].jtag_id && die_rev == omap_ids[i].die_rev) {
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system_rev = omap_ids[i].type;
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break;
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}
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}
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/* Finally check also the omap_id */
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for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
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if (jtag_id == omap_ids[i].jtag_id
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&& die_rev == omap_ids[i].die_rev
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&& omap_id == omap_ids[i].omap_id) {
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system_rev = omap_ids[i].type;
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break;
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}
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}
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/* Add the cpu class info (7xx, 15xx, 16xx, 24xx) */
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cpu_type = system_rev >> 24;
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switch (cpu_type) {
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case 0x07:
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system_rev |= 0x07;
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break;
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case 0x15:
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system_rev |= 0x15;
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break;
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case 0x16:
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case 0x17:
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system_rev |= 0x16;
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break;
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case 0x24:
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system_rev |= 0x24;
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break;
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default:
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printk("Unknown OMAP cpu type: 0x%02x\n", cpu_type);
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}
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printk("OMAP%04x", system_rev >> 16);
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if ((system_rev >> 8) & 0xff)
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printk("%x", (system_rev >> 8) & 0xff);
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printk(" revision %i handled as %02xxx id: %08x%08x\n",
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die_rev, system_rev & 0xff, system_serial_low,
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system_serial_high);
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}
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/*
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* ----------------------------------------------------------------------------
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* OMAP I/O mapping
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*
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* The machine specific code may provide the extra mapping besides the
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* default mapping provided here.
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* ----------------------------------------------------------------------------
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*/
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static struct map_desc omap_io_desc[] __initdata = {
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{ IO_VIRT, IO_PHYS, IO_SIZE, MT_DEVICE },
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};
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#ifdef CONFIG_ARCH_OMAP730
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static struct map_desc omap730_io_desc[] __initdata = {
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{ OMAP730_DSP_BASE, OMAP730_DSP_START, OMAP730_DSP_SIZE, MT_DEVICE },
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{ OMAP730_DSPREG_BASE, OMAP730_DSPREG_START, OMAP730_DSPREG_SIZE, MT_DEVICE },
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{ OMAP730_SRAM_BASE, OMAP730_SRAM_START, OMAP730_SRAM_SIZE, MT_DEVICE }
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};
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#endif
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#ifdef CONFIG_ARCH_OMAP1510
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static struct map_desc omap1510_io_desc[] __initdata = {
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{ OMAP1510_DSP_BASE, OMAP1510_DSP_START, OMAP1510_DSP_SIZE, MT_DEVICE },
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{ OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_START, OMAP1510_DSPREG_SIZE, MT_DEVICE },
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{ OMAP1510_SRAM_BASE, OMAP1510_SRAM_START, OMAP1510_SRAM_SIZE, MT_DEVICE }
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};
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#endif
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#if defined(CONFIG_ARCH_OMAP16XX)
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static struct map_desc omap1610_io_desc[] __initdata = {
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{ OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
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{ OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
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{ OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP1610_SRAM_SIZE, MT_DEVICE }
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};
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static struct map_desc omap5912_io_desc[] __initdata = {
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{ OMAP16XX_DSP_BASE, OMAP16XX_DSP_START, OMAP16XX_DSP_SIZE, MT_DEVICE },
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{ OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_START, OMAP16XX_DSPREG_SIZE, MT_DEVICE },
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/*
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* The OMAP5912 has 250kByte internal SRAM. Because the mapping is baseed on page
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* size (4kByte), it seems that the last 2kByte (=0x800) of the 250kByte are not mapped.
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* Add additional 2kByte (0x800) so that the last page is mapped and the last 2kByte
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* can be used.
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*/
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{ OMAP16XX_SRAM_BASE, OMAP16XX_SRAM_START, OMAP5912_SRAM_SIZE + 0x800, MT_DEVICE }
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};
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#endif
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static int initialized = 0;
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static void __init _omap_map_io(void)
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{
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initialized = 1;
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/* We have to initialize the IO space mapping before we can run
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* cpu_is_omapxxx() macros. */
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iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
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omap_check_revision();
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#ifdef CONFIG_ARCH_OMAP730
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if (cpu_is_omap730()) {
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iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc));
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}
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#endif
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#ifdef CONFIG_ARCH_OMAP1510
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if (cpu_is_omap1510()) {
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iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
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}
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#endif
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#if defined(CONFIG_ARCH_OMAP16XX)
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if (cpu_is_omap1610() || cpu_is_omap1710()) {
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iotable_init(omap1610_io_desc, ARRAY_SIZE(omap1610_io_desc));
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}
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if (cpu_is_omap5912()) {
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iotable_init(omap5912_io_desc, ARRAY_SIZE(omap5912_io_desc));
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}
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#endif
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/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
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* on a Posted Write in the TIPB Bridge".
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*/
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omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
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omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
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/* Must init clocks early to assure that timer interrupt works
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*/
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clk_init();
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}
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/*
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* This should only get called from board specific init
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*/
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void omap_map_io(void)
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{
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if (!initialized)
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_omap_map_io();
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}
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static inline unsigned int omap_serial_in(struct plat_serial8250_port *up,
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int offset)
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{
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offset <<= up->regshift;
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return (unsigned int)__raw_readb(up->membase + offset);
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}
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static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset,
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int value)
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{
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offset <<= p->regshift;
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__raw_writeb(value, p->membase + offset);
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}
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/*
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* Internal UARTs need to be initialized for the 8250 autoconfig to work
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* properly. Note that the TX watermark initialization may not be needed
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* once the 8250.c watermark handling code is merged.
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*/
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static void __init omap_serial_reset(struct plat_serial8250_port *p)
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{
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omap_serial_outp(p, UART_OMAP_MDR1, 0x07); /* disable UART */
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omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */
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omap_serial_outp(p, UART_OMAP_MDR1, 0x00); /* enable UART */
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if (!cpu_is_omap1510()) {
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omap_serial_outp(p, UART_OMAP_SYSC, 0x01);
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while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01));
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}
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}
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.membase = (char*)IO_ADDRESS(OMAP_UART1_BASE),
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.mapbase = (unsigned long)OMAP_UART1_BASE,
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.irq = INT_UART1,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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},
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{
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.membase = (char*)IO_ADDRESS(OMAP_UART2_BASE),
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.mapbase = (unsigned long)OMAP_UART2_BASE,
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.irq = INT_UART2,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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},
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{
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.membase = (char*)IO_ADDRESS(OMAP_UART3_BASE),
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.mapbase = (unsigned long)OMAP_UART3_BASE,
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.irq = INT_UART3,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = OMAP16XX_BASE_BAUD * 16,
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},
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{ },
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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/*
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* Note that on Innovator-1510 UART2 pins conflict with USB2.
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* By default UART2 does not work on Innovator-1510 if you have
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* USB OHCI enabled. To use UART2, you must disable USB2 first.
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*/
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void __init omap_serial_init(int ports[OMAP_MAX_NR_PORTS])
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{
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int i;
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if (cpu_is_omap730()) {
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serial_platform_data[0].regshift = 0;
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serial_platform_data[1].regshift = 0;
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serial_platform_data[0].irq = INT_730_UART_MODEM_1;
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serial_platform_data[1].irq = INT_730_UART_MODEM_IRDA_2;
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}
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if (cpu_is_omap1510()) {
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serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16;
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serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16;
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serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
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}
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for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
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unsigned char reg;
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if (ports[i] == 0) {
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serial_platform_data[i].membase = 0;
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serial_platform_data[i].mapbase = 0;
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continue;
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}
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switch (i) {
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case 0:
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if (cpu_is_omap1510()) {
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omap_cfg_reg(UART1_TX);
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omap_cfg_reg(UART1_RTS);
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if (machine_is_omap_innovator()) {
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reg = fpga_read(OMAP1510_FPGA_POWER);
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reg |= OMAP1510_FPGA_PCR_COM1_EN;
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fpga_write(reg, OMAP1510_FPGA_POWER);
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udelay(10);
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}
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}
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break;
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case 1:
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if (cpu_is_omap1510()) {
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omap_cfg_reg(UART2_TX);
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omap_cfg_reg(UART2_RTS);
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|
if (machine_is_omap_innovator()) {
|
|
reg = fpga_read(OMAP1510_FPGA_POWER);
|
|
reg |= OMAP1510_FPGA_PCR_COM2_EN;
|
|
fpga_write(reg, OMAP1510_FPGA_POWER);
|
|
udelay(10);
|
|
}
|
|
}
|
|
break;
|
|
case 2:
|
|
if (cpu_is_omap1510()) {
|
|
omap_cfg_reg(UART3_TX);
|
|
omap_cfg_reg(UART3_RX);
|
|
}
|
|
if (cpu_is_omap1710()) {
|
|
clk_enable(clk_get(0, "uart3_ck"));
|
|
}
|
|
break;
|
|
}
|
|
omap_serial_reset(&serial_platform_data[i]);
|
|
}
|
|
}
|
|
|
|
static int __init omap_init(void)
|
|
{
|
|
return platform_device_register(&serial_device);
|
|
}
|
|
arch_initcall(omap_init);
|
|
|
|
#define NO_LENGTH_CHECK 0xffffffff
|
|
|
|
extern int omap_bootloader_tag_len;
|
|
extern u8 omap_bootloader_tag[];
|
|
|
|
struct omap_board_config_kernel *omap_board_config;
|
|
int omap_board_config_size = 0;
|
|
|
|
static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
|
|
{
|
|
struct omap_board_config_kernel *kinfo = NULL;
|
|
int i;
|
|
|
|
#ifdef CONFIG_OMAP_BOOT_TAG
|
|
struct omap_board_config_entry *info = NULL;
|
|
|
|
if (omap_bootloader_tag_len > 4)
|
|
info = (struct omap_board_config_entry *) omap_bootloader_tag;
|
|
while (info != NULL) {
|
|
u8 *next;
|
|
|
|
if (info->tag == tag) {
|
|
if (skip == 0)
|
|
break;
|
|
skip--;
|
|
}
|
|
|
|
if ((info->len & 0x03) != 0) {
|
|
/* We bail out to avoid an alignment fault */
|
|
printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
|
|
info->len, info->tag);
|
|
return NULL;
|
|
}
|
|
next = (u8 *) info + sizeof(*info) + info->len;
|
|
if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
|
|
info = NULL;
|
|
else
|
|
info = (struct omap_board_config_entry *) next;
|
|
}
|
|
if (info != NULL) {
|
|
/* Check the length as a lame attempt to check for
|
|
* binary inconsistancy. */
|
|
if (len != NO_LENGTH_CHECK) {
|
|
/* Word-align len */
|
|
if (len & 0x03)
|
|
len = (len + 3) & ~0x03;
|
|
if (info->len != len) {
|
|
printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
|
|
tag, len, info->len);
|
|
return NULL;
|
|
}
|
|
}
|
|
if (len_out != NULL)
|
|
*len_out = info->len;
|
|
return info->data;
|
|
}
|
|
#endif
|
|
/* Try to find the config from the board-specific structures
|
|
* in the kernel. */
|
|
for (i = 0; i < omap_board_config_size; i++) {
|
|
if (omap_board_config[i].tag == tag) {
|
|
kinfo = &omap_board_config[i];
|
|
break;
|
|
}
|
|
}
|
|
if (kinfo == NULL)
|
|
return NULL;
|
|
return kinfo->data;
|
|
}
|
|
|
|
const void *__omap_get_config(u16 tag, size_t len, int nr)
|
|
{
|
|
return get_config(tag, len, nr, NULL);
|
|
}
|
|
EXPORT_SYMBOL(__omap_get_config);
|
|
|
|
const void *omap_get_var_config(u16 tag, size_t *len)
|
|
{
|
|
return get_config(tag, NO_LENGTH_CHECK, 0, len);
|
|
}
|
|
EXPORT_SYMBOL(omap_get_var_config);
|
|
|
|
static int __init omap_add_serial_console(void)
|
|
{
|
|
const struct omap_uart_config *info;
|
|
|
|
info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
|
|
if (info != NULL && info->console_uart) {
|
|
static char speed[11], *opt = NULL;
|
|
|
|
if (info->console_speed) {
|
|
snprintf(speed, sizeof(speed), "%u", info->console_speed);
|
|
opt = speed;
|
|
}
|
|
return add_preferred_console("ttyS", info->console_uart - 1, opt);
|
|
}
|
|
return 0;
|
|
}
|
|
console_initcall(omap_add_serial_console);
|