forked from luck/tmp_suning_uos_patched
7c76bdd7c3
Signed-off-by: Seth Jennings <sjenning@linux.vnet.ibm.com> Acked-by: Kent Yoder <key@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
336 lines
9.7 KiB
Plaintext
336 lines
9.7 KiB
Plaintext
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menuconfig CRYPTO_HW
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bool "Hardware crypto devices"
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default y
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---help---
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Say Y here to get to see options for hardware crypto devices and
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processors. This option alone does not add any kernel code.
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If you say N, all options in this submenu will be skipped and disabled.
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if CRYPTO_HW
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config CRYPTO_DEV_PADLOCK
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tristate "Support for VIA PadLock ACE"
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depends on X86 && !UML
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help
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Some VIA processors come with an integrated crypto engine
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(so called VIA PadLock ACE, Advanced Cryptography Engine)
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that provides instructions for very fast cryptographic
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operations with supported algorithms.
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The instructions are used only when the CPU supports them.
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Otherwise software encryption is used.
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config CRYPTO_DEV_PADLOCK_AES
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tristate "PadLock driver for AES algorithm"
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depends on CRYPTO_DEV_PADLOCK
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select CRYPTO_BLKCIPHER
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select CRYPTO_AES
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help
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Use VIA PadLock for AES algorithm.
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Available in VIA C3 and newer CPUs.
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If unsure say M. The compiled module will be
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called padlock-aes.
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config CRYPTO_DEV_PADLOCK_SHA
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tristate "PadLock driver for SHA1 and SHA256 algorithms"
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depends on CRYPTO_DEV_PADLOCK
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select CRYPTO_HASH
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select CRYPTO_SHA1
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select CRYPTO_SHA256
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help
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Use VIA PadLock for SHA1/SHA256 algorithms.
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Available in VIA C7 and newer processors.
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If unsure say M. The compiled module will be
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called padlock-sha.
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config CRYPTO_DEV_GEODE
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tristate "Support for the Geode LX AES engine"
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depends on X86_32 && PCI
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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Say 'Y' here to use the AMD Geode LX processor on-board AES
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engine for the CryptoAPI AES algorithm.
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To compile this driver as a module, choose M here: the module
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will be called geode-aes.
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config ZCRYPT
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tristate "Support for PCI-attached cryptographic adapters"
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depends on S390
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select HW_RANDOM
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help
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Select this option if you want to use a PCI-attached cryptographic
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adapter like:
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+ PCI Cryptographic Accelerator (PCICA)
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+ PCI Cryptographic Coprocessor (PCICC)
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+ PCI-X Cryptographic Coprocessor (PCIXCC)
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+ Crypto Express2 Coprocessor (CEX2C)
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+ Crypto Express2 Accelerator (CEX2A)
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+ Crypto Express3 Coprocessor (CEX3C)
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+ Crypto Express3 Accelerator (CEX3A)
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config CRYPTO_SHA1_S390
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tristate "SHA1 digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
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It is available as of z990.
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config CRYPTO_SHA256_S390
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tristate "SHA256 digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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SHA256 secure hash standard (DFIPS 180-2).
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It is available as of z9.
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config CRYPTO_SHA512_S390
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tristate "SHA384 and SHA512 digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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SHA512 secure hash standard.
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It is available as of z10.
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config CRYPTO_DES_S390
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tristate "DES and Triple DES cipher algorithms"
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depends on S390
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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select CRYPTO_DES
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help
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This is the s390 hardware accelerated implementation of the
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DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
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As of z990 the ECB and CBC mode are hardware accelerated.
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As of z196 the CTR mode is hardware accelerated.
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config CRYPTO_AES_S390
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tristate "AES cipher algorithms"
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depends on S390
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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This is the s390 hardware accelerated implementation of the
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AES cipher algorithms (FIPS-197).
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As of z9 the ECB and CBC modes are hardware accelerated
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for 128 bit keys.
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As of z10 the ECB and CBC modes are hardware accelerated
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for all AES key sizes.
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As of z196 the CTR mode is hardware accelerated for all AES
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key sizes and XTS mode is hardware accelerated for 256 and
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512 bit keys.
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config S390_PRNG
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tristate "Pseudo random number generator device driver"
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depends on S390
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default "m"
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help
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Select this option if you want to use the s390 pseudo random number
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generator. The PRNG is part of the cryptographic processor functions
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and uses triple-DES to generate secure random numbers like the
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ANSI X9.17 standard. User-space programs access the
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pseudo-random-number device through the char device /dev/prandom.
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It is available as of z9.
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config CRYPTO_GHASH_S390
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tristate "GHASH digest algorithm"
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depends on S390
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select CRYPTO_HASH
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help
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This is the s390 hardware accelerated implementation of the
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GHASH message digest algorithm for GCM (Galois/Counter Mode).
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It is available as of z196.
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config CRYPTO_DEV_MV_CESA
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tristate "Marvell's Cryptographic Engine"
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depends on PLAT_ORION
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select CRYPTO_ALGAPI
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select CRYPTO_AES
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select CRYPTO_BLKCIPHER2
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select CRYPTO_HASH
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help
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This driver allows you to utilize the Cryptographic Engines and
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Security Accelerator (CESA) which can be found on the Marvell Orion
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and Kirkwood SoCs, such as QNAP's TS-209.
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Currently the driver supports AES in ECB and CBC mode without DMA.
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config CRYPTO_DEV_NIAGARA2
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tristate "Niagara2 Stream Processing Unit driver"
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select CRYPTO_DES
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select CRYPTO_ALGAPI
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depends on SPARC64
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help
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Each core of a Niagara2 processor contains a Stream
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Processing Unit, which itself contains several cryptographic
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sub-units. One set provides the Modular Arithmetic Unit,
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used for SSL offload. The other set provides the Cipher
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Group, which can perform encryption, decryption, hashing,
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checksumming, and raw copies.
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config CRYPTO_DEV_HIFN_795X
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tristate "Driver HIFN 795x crypto accelerator chips"
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select CRYPTO_DES
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
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depends on PCI
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depends on !ARCH_DMA_ADDR_T_64BIT
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help
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This option allows you to have support for HIFN 795x crypto adapters.
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config CRYPTO_DEV_HIFN_795X_RNG
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bool "HIFN 795x random number generator"
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depends on CRYPTO_DEV_HIFN_795X
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help
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Select this option if you want to enable the random number generator
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on the HIFN 795x crypto adapters.
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source drivers/crypto/caam/Kconfig
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config CRYPTO_DEV_TALITOS
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tristate "Talitos Freescale Security Engine (SEC)"
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select CRYPTO_ALGAPI
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select CRYPTO_AUTHENC
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select HW_RANDOM
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depends on FSL_SOC
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help
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Say 'Y' here to use the Freescale Security Engine (SEC)
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to offload cryptographic algorithm computation.
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The Freescale SEC is present on PowerQUICC 'E' processors, such
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as the MPC8349E and MPC8548E.
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To compile this driver as a module, choose M here: the module
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will be called talitos.
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config CRYPTO_DEV_IXP4XX
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tristate "Driver for IXP4xx crypto hardware acceleration"
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depends on ARCH_IXP4XX
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select CRYPTO_DES
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select CRYPTO_ALGAPI
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select CRYPTO_AUTHENC
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select CRYPTO_BLKCIPHER
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help
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Driver for the IXP4xx NPE crypto engine.
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config CRYPTO_DEV_PPC4XX
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tristate "Driver AMCC PPC4xx crypto accelerator"
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depends on PPC && 4xx
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select CRYPTO_HASH
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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This option allows you to have support for AMCC crypto acceleration.
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config CRYPTO_DEV_OMAP_SHAM
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tristate "Support for OMAP SHA1/MD5 hw accelerator"
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depends on ARCH_OMAP2 || ARCH_OMAP3
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select CRYPTO_SHA1
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select CRYPTO_MD5
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help
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OMAP processors have SHA1/MD5 hw accelerator. Select this if you
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want to use the OMAP module for SHA1/MD5 algorithms.
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config CRYPTO_DEV_OMAP_AES
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tristate "Support for OMAP AES hw engine"
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depends on ARCH_OMAP2 || ARCH_OMAP3
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select CRYPTO_AES
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help
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OMAP processors have AES module accelerator. Select this if you
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want to use the OMAP module for AES algorithms.
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config CRYPTO_DEV_PICOXCELL
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tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
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depends on ARCH_PICOXCELL && HAVE_CLK
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select CRYPTO_AES
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select CRYPTO_AUTHENC
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select CRYPTO_ALGAPI
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select CRYPTO_DES
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select CRYPTO_CBC
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select CRYPTO_ECB
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select CRYPTO_SEQIV
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help
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This option enables support for the hardware offload engines in the
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Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
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and for 3gpp Layer 2 ciphering support.
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Saying m here will build a module named pipcoxcell_crypto.
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config CRYPTO_DEV_S5P
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tristate "Support for Samsung S5PV210 crypto accelerator"
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depends on ARCH_S5PV210
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select CRYPTO_AES
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select CRYPTO_ALGAPI
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select CRYPTO_BLKCIPHER
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help
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This option allows you to have support for S5P crypto acceleration.
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Select this to offload Samsung S5PV210 or S5PC110 from AES
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algorithms execution.
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config CRYPTO_DEV_TEGRA_AES
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tristate "Support for TEGRA AES hw engine"
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depends on ARCH_TEGRA
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select CRYPTO_AES
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help
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TEGRA processors have AES module accelerator. Select this if you
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want to use the TEGRA module for AES algorithms.
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To compile this driver as a module, choose M here: the module
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will be called tegra-aes.
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config CRYPTO_DEV_NX
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tristate "Support for Power7+ in-Nest cryptographic acceleration"
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depends on PPC64 && IBMVIO
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select CRYPTO_AES
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select CRYPTO_CBC
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select CRYPTO_ECB
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select CRYPTO_CCM
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select CRYPTO_GCM
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select CRYPTO_AUTHENC
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select CRYPTO_XCBC
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select CRYPTO_SHA256
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select CRYPTO_SHA512
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help
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Support for Power7+ in-Nest cryptographic acceleration. This
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module supports acceleration for AES and SHA2 algorithms. If you
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choose 'M' here, this module will be called nx_crypto.
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config CRYPTO_DEV_UX500
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tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
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depends on ARCH_U8500
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select CRYPTO_ALGAPI
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help
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Driver for ST-Ericsson UX500 crypto engine.
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if CRYPTO_DEV_UX500
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source "drivers/crypto/ux500/Kconfig"
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endif # if CRYPTO_DEV_UX500
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config CRYPTO_DEV_BFIN_CRC
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tristate "Support for Blackfin CRC hardware"
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depends on BF60x
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help
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Newer Blackfin processors have CRC hardware. Select this if you
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want to use the Blackfin CRC module.
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endif # CRYPTO_HW
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