forked from luck/tmp_suning_uos_patched
a4553358d9
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
78 lines
1.8 KiB
C
78 lines
1.8 KiB
C
#include <linux/sysdev.h>
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#include <asm/clkdev.h>
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struct clkops {
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void (*enable)(struct clk *);
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void (*disable)(struct clk *);
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unsigned long (*getrate)(struct clk *);
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};
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struct clk {
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const struct clkops *ops;
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unsigned long rate;
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unsigned int cken;
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unsigned int delay;
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unsigned int enabled;
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};
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void clk_dummy_enable(struct clk *);
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void clk_dummy_disable(struct clk *);
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extern const struct clkops clk_dummy_ops;
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extern struct clk clk_dummy;
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#define INIT_CLKREG(_clk,_devname,_conname) \
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{ \
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.clk = _clk, \
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.dev_id = _devname, \
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.con_id = _conname, \
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}
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#define DEFINE_CK(_name, _cken, _ops) \
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struct clk clk_##_name = { \
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.ops = _ops, \
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.cken = CKEN_##_cken, \
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}
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#define DEFINE_CLK(_name, _ops, _rate, _delay) \
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struct clk clk_##_name = { \
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.ops = _ops, \
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.rate = _rate, \
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.delay = _delay, \
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}
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#define DEFINE_PXA2_CKEN(_name, _cken, _rate, _delay) \
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struct clk clk_##_name = { \
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.ops = &clk_pxa2xx_cken_ops, \
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.rate = _rate, \
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.cken = CKEN_##_cken, \
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.delay = _delay, \
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}
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extern const struct clkops clk_pxa2xx_cken_ops;
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void clk_pxa2xx_cken_enable(struct clk *clk);
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void clk_pxa2xx_cken_disable(struct clk *clk);
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extern struct sysdev_class pxa2xx_clock_sysclass;
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#if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x)
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#define DEFINE_PXA3_CKEN(_name, _cken, _rate, _delay) \
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struct clk clk_##_name = { \
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.ops = &clk_pxa3xx_cken_ops, \
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.rate = _rate, \
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.cken = CKEN_##_cken, \
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.delay = _delay, \
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}
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extern const struct clkops clk_pxa3xx_cken_ops;
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extern const struct clkops clk_pxa3xx_hsio_ops;
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extern const struct clkops clk_pxa3xx_ac97_ops;
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extern const struct clkops clk_pxa3xx_pout_ops;
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extern void clk_pxa3xx_cken_enable(struct clk *);
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extern void clk_pxa3xx_cken_disable(struct clk *);
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extern struct sysdev_class pxa3xx_clock_sysclass;
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#endif
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