forked from luck/tmp_suning_uos_patched
a8553acd6c
Cleanup: remove irq_descp() - explicit use of irq_desc[] is shorter and more readable. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
295 lines
6.9 KiB
C
295 lines
6.9 KiB
C
/*
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* linux/arch/ia64/kernel/irq.c
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*
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* Copyright (C) 1998-2001 Hewlett-Packard Co
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* Stephane Eranian <eranian@hpl.hp.com>
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*
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* 6/10/99: Updated to bring in sync with x86 version to facilitate
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* support for SMP and different interrupt controllers.
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*
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* 09/15/00 Goutham Rao <goutham.rao@intel.com> Implemented pci_irq_to_vector
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* PCI to vector allocation routine.
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* 04/14/2004 Ashok Raj <ashok.raj@intel.com>
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* Added CPU Hotplug handling for IPF.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/jiffies.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/kernel_stat.h>
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#include <linux/slab.h>
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#include <linux/ptrace.h>
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#include <linux/random.h> /* for rand_initialize_irq() */
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#include <linux/signal.h>
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#include <linux/smp.h>
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#include <linux/smp_lock.h>
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#include <linux/threads.h>
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#include <linux/bitops.h>
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#include <asm/delay.h>
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#include <asm/intrinsics.h>
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#include <asm/io.h>
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#include <asm/hw_irq.h>
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#include <asm/machvec.h>
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#include <asm/pgtable.h>
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#include <asm/system.h>
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#ifdef CONFIG_PERFMON
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# include <asm/perfmon.h>
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#endif
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#define IRQ_DEBUG 0
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/* These can be overridden in platform_irq_init */
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int ia64_first_device_vector = IA64_DEF_FIRST_DEVICE_VECTOR;
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int ia64_last_device_vector = IA64_DEF_LAST_DEVICE_VECTOR;
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/* default base addr of IPI table */
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void __iomem *ipi_base_addr = ((void __iomem *)
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(__IA64_UNCACHED_OFFSET | IA64_IPI_DEFAULT_BASE_ADDR));
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/*
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* Legacy IRQ to IA-64 vector translation table.
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*/
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__u8 isa_irq_to_vector_map[16] = {
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/* 8259 IRQ translation, first 16 entries */
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0x2f, 0x20, 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29,
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0x28, 0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21
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};
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EXPORT_SYMBOL(isa_irq_to_vector_map);
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static unsigned long ia64_vector_mask[BITS_TO_LONGS(IA64_MAX_DEVICE_VECTORS)];
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int
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assign_irq_vector (int irq)
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{
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int pos, vector;
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again:
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pos = find_first_zero_bit(ia64_vector_mask, IA64_NUM_DEVICE_VECTORS);
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vector = IA64_FIRST_DEVICE_VECTOR + pos;
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if (vector > IA64_LAST_DEVICE_VECTOR)
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return -ENOSPC;
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if (test_and_set_bit(pos, ia64_vector_mask))
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goto again;
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return vector;
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}
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void
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free_irq_vector (int vector)
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{
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int pos;
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if (vector < IA64_FIRST_DEVICE_VECTOR || vector > IA64_LAST_DEVICE_VECTOR)
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return;
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pos = vector - IA64_FIRST_DEVICE_VECTOR;
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if (!test_and_clear_bit(pos, ia64_vector_mask))
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printk(KERN_WARNING "%s: double free!\n", __FUNCTION__);
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}
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int
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reserve_irq_vector (int vector)
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{
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int pos;
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if (vector < IA64_FIRST_DEVICE_VECTOR ||
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vector > IA64_LAST_DEVICE_VECTOR)
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return -EINVAL;
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pos = vector - IA64_FIRST_DEVICE_VECTOR;
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return test_and_set_bit(pos, ia64_vector_mask);
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}
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#ifdef CONFIG_SMP
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# define IS_RESCHEDULE(vec) (vec == IA64_IPI_RESCHEDULE)
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#else
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# define IS_RESCHEDULE(vec) (0)
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#endif
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/*
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* That's where the IVT branches when we get an external
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* interrupt. This branches to the correct hardware IRQ handler via
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* function ptr.
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*/
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void
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ia64_handle_irq (ia64_vector vector, struct pt_regs *regs)
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{
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unsigned long saved_tpr;
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#if IRQ_DEBUG
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{
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unsigned long bsp, sp;
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/*
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* Note: if the interrupt happened while executing in
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* the context switch routine (ia64_switch_to), we may
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* get a spurious stack overflow here. This is
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* because the register and the memory stack are not
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* switched atomically.
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*/
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bsp = ia64_getreg(_IA64_REG_AR_BSP);
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sp = ia64_getreg(_IA64_REG_SP);
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if ((sp - bsp) < 1024) {
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static unsigned char count;
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static long last_time;
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if (jiffies - last_time > 5*HZ)
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count = 0;
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if (++count < 5) {
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last_time = jiffies;
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printk("ia64_handle_irq: DANGER: less than "
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"1KB of free stack space!!\n"
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"(bsp=0x%lx, sp=%lx)\n", bsp, sp);
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}
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}
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}
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#endif /* IRQ_DEBUG */
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/*
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* Always set TPR to limit maximum interrupt nesting depth to
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* 16 (without this, it would be ~240, which could easily lead
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* to kernel stack overflows).
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*/
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irq_enter();
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saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
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ia64_srlz_d();
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while (vector != IA64_SPURIOUS_INT_VECTOR) {
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if (!IS_RESCHEDULE(vector)) {
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ia64_setreg(_IA64_REG_CR_TPR, vector);
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ia64_srlz_d();
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__do_IRQ(local_vector_to_irq(vector), regs);
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/*
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* Disable interrupts and send EOI:
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*/
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local_irq_disable();
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ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
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}
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ia64_eoi();
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vector = ia64_get_ivr();
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}
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/*
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* This must be done *after* the ia64_eoi(). For example, the keyboard softirq
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* handler needs to be able to wait for further keyboard interrupts, which can't
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* come through until ia64_eoi() has been done.
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*/
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irq_exit();
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}
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* This function emulates a interrupt processing when a cpu is about to be
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* brought down.
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*/
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void ia64_process_pending_intr(void)
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{
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ia64_vector vector;
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unsigned long saved_tpr;
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extern unsigned int vectors_in_migration[NR_IRQS];
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vector = ia64_get_ivr();
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irq_enter();
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saved_tpr = ia64_getreg(_IA64_REG_CR_TPR);
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ia64_srlz_d();
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/*
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* Perform normal interrupt style processing
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*/
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while (vector != IA64_SPURIOUS_INT_VECTOR) {
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if (!IS_RESCHEDULE(vector)) {
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ia64_setreg(_IA64_REG_CR_TPR, vector);
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ia64_srlz_d();
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/*
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* Now try calling normal ia64_handle_irq as it would have got called
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* from a real intr handler. Try passing null for pt_regs, hopefully
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* it will work. I hope it works!.
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* Probably could shared code.
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*/
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vectors_in_migration[local_vector_to_irq(vector)]=0;
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__do_IRQ(local_vector_to_irq(vector), NULL);
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/*
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* Disable interrupts and send EOI
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*/
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local_irq_disable();
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ia64_setreg(_IA64_REG_CR_TPR, saved_tpr);
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}
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ia64_eoi();
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vector = ia64_get_ivr();
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}
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irq_exit();
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}
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#endif
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#ifdef CONFIG_SMP
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extern irqreturn_t handle_IPI (int irq, void *dev_id, struct pt_regs *regs);
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static struct irqaction ipi_irqaction = {
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.handler = handle_IPI,
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.flags = SA_INTERRUPT,
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.name = "IPI"
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};
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#endif
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void
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register_percpu_irq (ia64_vector vec, struct irqaction *action)
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{
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irq_desc_t *desc;
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unsigned int irq;
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for (irq = 0; irq < NR_IRQS; ++irq)
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if (irq_to_vector(irq) == vec) {
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desc = irq_desc + irq;
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desc->status |= IRQ_PER_CPU;
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desc->chip = &irq_type_ia64_lsapic;
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if (action)
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setup_irq(irq, action);
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}
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}
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void __init
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init_IRQ (void)
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{
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register_percpu_irq(IA64_SPURIOUS_INT_VECTOR, NULL);
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#ifdef CONFIG_SMP
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register_percpu_irq(IA64_IPI_VECTOR, &ipi_irqaction);
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#endif
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#ifdef CONFIG_PERFMON
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pfm_init_percpu();
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#endif
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platform_irq_init();
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}
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void
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ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect)
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{
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void __iomem *ipi_addr;
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unsigned long ipi_data;
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unsigned long phys_cpu_id;
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#ifdef CONFIG_SMP
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phys_cpu_id = cpu_physical_id(cpu);
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#else
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phys_cpu_id = (ia64_getreg(_IA64_REG_CR_LID) >> 16) & 0xffff;
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#endif
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/*
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* cpu number is in 8bit ID and 8bit EID
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*/
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ipi_data = (delivery_mode << 8) | (vector & 0xff);
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ipi_addr = ipi_base_addr + ((phys_cpu_id << 4) | ((redirect & 1) << 3));
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writeq(ipi_data, ipi_addr);
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}
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