kernel_optimize_test/include/drm/bridge
Neil Armstrong a328ca7e4a drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate
The Amlogic D-PHY in the Amlogic AXG SoC Family does support a frequency
higher than 10MHz for the TX Escape Clock, thus make the target rate
configurable.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Philippe Cornu <philippe.cornu@st.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200904125531.15248-1-narmstrong@baylibre.com
2020-09-11 15:01:36 +02:00
..
analogix_dp.h drm/bridge: analogix_dp: Split bind() into probe() and real bind() 2020-04-09 10:29:35 +02:00
dw_hdmi.h drm: bridge: dw-hdmi: Pass drm_display_info to dw_hdmi_support_scdc() 2020-06-23 19:57:06 +02:00
dw_mipi_dsi.h drm/bridge: dw-mipi-dsi: permit configuring the escape clock rate 2020-09-11 15:01:36 +02:00
mhl.h drm/bridge/mhl.h: Replace zero-length array with flexible-array member 2020-03-06 11:52:01 +01:00