forked from luck/tmp_suning_uos_patched
4fb2847437
Instruction fault status register, IFSR, was introduced on ARMv6 to
provide status information about the last insturction fault. It
needed for proper prefetch abort handling.
Now we have three prefetch abort model:
* legacy - for CPUs before ARMv6. They doesn't provide neither
IFSR nor IFAR. We simulate IFSR with section translation fault
status for them to generalize code;
* ARMv6 - provides IFSR, but not IFAR;
* ARMv7 - provides both IFSR and IFAR.
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
136 lines
3.1 KiB
ArmAsm
136 lines
3.1 KiB
ArmAsm
/*
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* linux/arch/arm/mm/proc-arm9tdmi.S: utility functions for ARM9TDMI
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*
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* Copyright (C) 2003-2006 Hyok S. Choi <hyok.choi@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/linkage.h>
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#include <linux/init.h>
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#include <asm/assembler.h>
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#include <asm/asm-offsets.h>
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#include <asm/hwcap.h>
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#include <asm/pgtable-hwdef.h>
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#include <asm/pgtable.h>
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#include <asm/ptrace.h>
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.text
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/*
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* cpu_arm9tdmi_proc_init()
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* cpu_arm9tdmi_do_idle()
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* cpu_arm9tdmi_dcache_clean_area()
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* cpu_arm9tdmi_switch_mm()
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*
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* These are not required.
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*/
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ENTRY(cpu_arm9tdmi_proc_init)
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ENTRY(cpu_arm9tdmi_do_idle)
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ENTRY(cpu_arm9tdmi_dcache_clean_area)
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ENTRY(cpu_arm9tdmi_switch_mm)
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mov pc, lr
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/*
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* cpu_arm9tdmi_proc_fin()
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*/
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ENTRY(cpu_arm9tdmi_proc_fin)
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mov r0, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
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msr cpsr_c, r0
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mov pc, lr
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/*
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* Function: cpu_arm9tdmi_reset(loc)
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* Params : loc(r0) address to jump to
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* Purpose : Sets up everything for a reset and jump to the location for soft reset.
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*/
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ENTRY(cpu_arm9tdmi_reset)
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mov pc, r0
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__INIT
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.type __arm9tdmi_setup, #function
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__arm9tdmi_setup:
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mov pc, lr
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.size __arm9tdmi_setup, . - __arm9tdmi_setup
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__INITDATA
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/*
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* Purpose : Function pointers used to access above functions - all calls
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* come through these
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*/
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.type arm9tdmi_processor_functions, #object
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ENTRY(arm9tdmi_processor_functions)
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.word nommu_early_abort
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.word legacy_pabort
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.word cpu_arm9tdmi_proc_init
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.word cpu_arm9tdmi_proc_fin
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.word cpu_arm9tdmi_reset
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.word cpu_arm9tdmi_do_idle
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.word cpu_arm9tdmi_dcache_clean_area
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.word cpu_arm9tdmi_switch_mm
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.word 0 @ cpu_*_set_pte
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.size arm9tdmi_processor_functions, . - arm9tdmi_processor_functions
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.section ".rodata"
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.type cpu_arch_name, #object
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cpu_arch_name:
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.asciz "armv4t"
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.size cpu_arch_name, . - cpu_arch_name
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.type cpu_elf_name, #object
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cpu_elf_name:
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.asciz "v4"
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.size cpu_elf_name, . - cpu_elf_name
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.type cpu_arm9tdmi_name, #object
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cpu_arm9tdmi_name:
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.asciz "ARM9TDMI"
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.size cpu_arm9tdmi_name, . - cpu_arm9tdmi_name
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.type cpu_p2001_name, #object
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cpu_p2001_name:
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.asciz "P2001"
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.size cpu_p2001_name, . - cpu_p2001_name
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.align
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.section ".proc.info.init", #alloc, #execinstr
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.type __arm9tdmi_proc_info, #object
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__arm9tdmi_proc_info:
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.long 0x41009900
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.long 0xfff8ff00
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.long 0
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.long 0
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b __arm9tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_arm9tdmi_name
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.long arm9tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __arm9tdmi_proc_info, . - __arm9dmi_proc_info
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.type __p2001_proc_info, #object
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__p2001_proc_info:
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.long 0x41029000
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.long 0xffffffff
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.long 0
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.long 0
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b __arm9tdmi_setup
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.long cpu_arch_name
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.long cpu_elf_name
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.long HWCAP_SWP | HWCAP_THUMB | HWCAP_26BIT
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.long cpu_p2001_name
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.long arm9tdmi_processor_functions
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.long 0
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.long 0
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.long v4_cache_fns
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.size __p2001_proc_info, . - __p2001_proc_info
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