forked from luck/tmp_suning_uos_patched
b0454a28f6
commit 6c810cf20feef0d4338e9b424ab7f2644a8b353e upstream.
The MIPS Poly1305 implementation is generic MIPS code written such as to
support down to the original MIPS I and MIPS III ISA for the 32-bit and
64-bit variant respectively. Lift the current limitation then to enable
code for MIPSr1 ISA or newer processors only and have it available for
all MIPS processors.
Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk>
Fixes:
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.. | ||
chacha-core.S | ||
chacha-glue.c | ||
crc32-mips.c | ||
Makefile | ||
poly1305-glue.c | ||
poly1305-mips.pl |