Noam Camus b1f2f6f3cf ARC: [plat-eznps] Use dedicated SMP barriers ... NPS device got 256 cores and each got 16 HW threads (SMT). We use EZchip dedicated ISA to trigger HW scheduler of the core that current HW thread belongs to. This scheduling makes sure that data beyond barrier is available to all HW threads in core and by that to all in device (4K). Signed-off-by: Noam Camus <noamc@ezchip.com> Cc: Peter Zijlstra <peterz@infradead.org>		2016-05-09 09:32:33 +05:30
..
boot	ARC: [plat-eznps] Add eznps board defconfig and dts	2016-05-09 09:32:32 +05:30
configs	ARC: [plat-eznps] Add eznps board defconfig and dts	2016-05-09 09:32:32 +05:30
include	ARC: [plat-eznps] Use dedicated SMP barriers	2016-05-09 09:32:33 +05:30
kernel	ARC: Mark secondary cpu online only after all HW setup is done	2016-05-09 09:32:32 +05:30
lib
mm	ARC: [plat-eznps] Use dedicated user stack top	2016-05-09 09:32:32 +05:30
oprofile
plat-axs10x	ARC: Don't try to use value of top level clock-frequency in DT	2016-05-09 09:32:30 +05:30
plat-eznps	ARC: [plat-eznps] Add eznps platform	2016-05-09 09:32:32 +05:30
plat-sim
plat-tb10x
Kbuild
Kconfig	ARC: Make vmalloc size configurable	2016-05-09 09:32:32 +05:30
Kconfig.debug
Makefile