forked from luck/tmp_suning_uos_patched
2025cf9e19
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 263 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.208660670@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
263 lines
6.3 KiB
C
263 lines
6.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2015, Fuzhou Rockchip Electronics Co., Ltd
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#define MAILBOX_A2B_INTEN 0x00
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#define MAILBOX_A2B_STATUS 0x04
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#define MAILBOX_A2B_CMD(x) (0x08 + (x) * 8)
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#define MAILBOX_A2B_DAT(x) (0x0c + (x) * 8)
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#define MAILBOX_B2A_INTEN 0x28
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#define MAILBOX_B2A_STATUS 0x2C
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#define MAILBOX_B2A_CMD(x) (0x30 + (x) * 8)
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#define MAILBOX_B2A_DAT(x) (0x34 + (x) * 8)
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struct rockchip_mbox_msg {
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u32 cmd;
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int rx_size;
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};
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struct rockchip_mbox_data {
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int num_chans;
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};
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struct rockchip_mbox_chan {
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int idx;
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int irq;
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struct rockchip_mbox_msg *msg;
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struct rockchip_mbox *mb;
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};
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struct rockchip_mbox {
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struct mbox_controller mbox;
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struct clk *pclk;
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void __iomem *mbox_base;
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/* The maximum size of buf for each channel */
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u32 buf_size;
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struct rockchip_mbox_chan *chans;
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};
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static int rockchip_mbox_send_data(struct mbox_chan *chan, void *data)
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{
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struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev);
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struct rockchip_mbox_msg *msg = data;
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struct rockchip_mbox_chan *chans = mb->chans;
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if (!msg)
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return -EINVAL;
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if (msg->rx_size > mb->buf_size) {
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dev_err(mb->mbox.dev, "Transmit size over buf size(%d)\n",
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mb->buf_size);
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return -EINVAL;
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}
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dev_dbg(mb->mbox.dev, "Chan[%d]: A2B message, cmd 0x%08x\n",
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chans->idx, msg->cmd);
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mb->chans[chans->idx].msg = msg;
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writel_relaxed(msg->cmd, mb->mbox_base + MAILBOX_A2B_CMD(chans->idx));
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writel_relaxed(msg->rx_size, mb->mbox_base +
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MAILBOX_A2B_DAT(chans->idx));
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return 0;
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}
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static int rockchip_mbox_startup(struct mbox_chan *chan)
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{
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struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev);
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/* Enable all B2A interrupts */
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writel_relaxed((1 << mb->mbox.num_chans) - 1,
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mb->mbox_base + MAILBOX_B2A_INTEN);
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return 0;
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}
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static void rockchip_mbox_shutdown(struct mbox_chan *chan)
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{
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struct rockchip_mbox *mb = dev_get_drvdata(chan->mbox->dev);
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struct rockchip_mbox_chan *chans = mb->chans;
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/* Disable all B2A interrupts */
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writel_relaxed(0, mb->mbox_base + MAILBOX_B2A_INTEN);
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mb->chans[chans->idx].msg = NULL;
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}
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static const struct mbox_chan_ops rockchip_mbox_chan_ops = {
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.send_data = rockchip_mbox_send_data,
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.startup = rockchip_mbox_startup,
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.shutdown = rockchip_mbox_shutdown,
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};
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static irqreturn_t rockchip_mbox_irq(int irq, void *dev_id)
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{
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int idx;
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struct rockchip_mbox *mb = (struct rockchip_mbox *)dev_id;
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u32 status = readl_relaxed(mb->mbox_base + MAILBOX_B2A_STATUS);
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for (idx = 0; idx < mb->mbox.num_chans; idx++) {
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if ((status & (1 << idx)) && (irq == mb->chans[idx].irq)) {
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/* Clear mbox interrupt */
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writel_relaxed(1 << idx,
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mb->mbox_base + MAILBOX_B2A_STATUS);
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return IRQ_WAKE_THREAD;
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}
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}
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return IRQ_NONE;
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}
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static irqreturn_t rockchip_mbox_isr(int irq, void *dev_id)
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{
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int idx;
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struct rockchip_mbox_msg *msg = NULL;
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struct rockchip_mbox *mb = (struct rockchip_mbox *)dev_id;
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for (idx = 0; idx < mb->mbox.num_chans; idx++) {
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if (irq != mb->chans[idx].irq)
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continue;
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msg = mb->chans[idx].msg;
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if (!msg) {
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dev_err(mb->mbox.dev,
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"Chan[%d]: B2A message is NULL\n", idx);
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break; /* spurious */
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}
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mbox_chan_received_data(&mb->mbox.chans[idx], msg);
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mb->chans[idx].msg = NULL;
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dev_dbg(mb->mbox.dev, "Chan[%d]: B2A message, cmd 0x%08x\n",
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idx, msg->cmd);
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break;
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}
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return IRQ_HANDLED;
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}
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static const struct rockchip_mbox_data rk3368_drv_data = {
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.num_chans = 4,
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};
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static const struct of_device_id rockchip_mbox_of_match[] = {
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{ .compatible = "rockchip,rk3368-mailbox", .data = &rk3368_drv_data},
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{ },
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};
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MODULE_DEVICE_TABLE(of, rockchp_mbox_of_match);
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static int rockchip_mbox_probe(struct platform_device *pdev)
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{
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struct rockchip_mbox *mb;
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const struct of_device_id *match;
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const struct rockchip_mbox_data *drv_data;
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struct resource *res;
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int ret, irq, i;
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if (!pdev->dev.of_node)
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return -ENODEV;
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match = of_match_node(rockchip_mbox_of_match, pdev->dev.of_node);
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drv_data = (const struct rockchip_mbox_data *)match->data;
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mb = devm_kzalloc(&pdev->dev, sizeof(*mb), GFP_KERNEL);
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if (!mb)
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return -ENOMEM;
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mb->chans = devm_kcalloc(&pdev->dev, drv_data->num_chans,
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sizeof(*mb->chans), GFP_KERNEL);
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if (!mb->chans)
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return -ENOMEM;
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mb->mbox.chans = devm_kcalloc(&pdev->dev, drv_data->num_chans,
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sizeof(*mb->mbox.chans), GFP_KERNEL);
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if (!mb->mbox.chans)
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return -ENOMEM;
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platform_set_drvdata(pdev, mb);
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mb->mbox.dev = &pdev->dev;
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mb->mbox.num_chans = drv_data->num_chans;
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mb->mbox.ops = &rockchip_mbox_chan_ops;
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mb->mbox.txdone_irq = true;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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mb->mbox_base = devm_ioremap_resource(&pdev->dev, res);
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if (IS_ERR(mb->mbox_base))
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return PTR_ERR(mb->mbox_base);
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/* Each channel has two buffers for A2B and B2A */
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mb->buf_size = (size_t)resource_size(res) / (drv_data->num_chans * 2);
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mb->pclk = devm_clk_get(&pdev->dev, "pclk_mailbox");
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if (IS_ERR(mb->pclk)) {
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ret = PTR_ERR(mb->pclk);
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dev_err(&pdev->dev, "failed to get pclk_mailbox clock: %d\n",
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ret);
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return ret;
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}
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ret = clk_prepare_enable(mb->pclk);
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if (ret) {
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dev_err(&pdev->dev, "failed to enable pclk: %d\n", ret);
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return ret;
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}
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for (i = 0; i < mb->mbox.num_chans; i++) {
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irq = platform_get_irq(pdev, i);
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if (irq < 0)
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return irq;
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ret = devm_request_threaded_irq(&pdev->dev, irq,
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rockchip_mbox_irq,
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rockchip_mbox_isr, IRQF_ONESHOT,
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dev_name(&pdev->dev), mb);
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if (ret < 0)
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return ret;
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mb->chans[i].idx = i;
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mb->chans[i].irq = irq;
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mb->chans[i].mb = mb;
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mb->chans[i].msg = NULL;
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}
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ret = devm_mbox_controller_register(&pdev->dev, &mb->mbox);
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if (ret < 0)
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dev_err(&pdev->dev, "Failed to register mailbox: %d\n", ret);
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return ret;
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}
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static struct platform_driver rockchip_mbox_driver = {
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.probe = rockchip_mbox_probe,
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.driver = {
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.name = "rockchip-mailbox",
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.of_match_table = of_match_ptr(rockchip_mbox_of_match),
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},
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};
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module_platform_driver(rockchip_mbox_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_DESCRIPTION("Rockchip mailbox: communicate between CPU cores and MCU");
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MODULE_AUTHOR("Addy Ke <addy.ke@rock-chips.com>");
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MODULE_AUTHOR("Caesar Wang <wxt@rock-chips.com>");
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