forked from luck/tmp_suning_uos_patched
3ddfbcf19b
This patch consolidates macros used to generate assembly for compatibility across different CPUs or configs. A new header, asm-powerpc/asm-compat.h contains the main compatibility macros. It uses some preprocessor magic to make the macros suitable both for use in .S files, and in inline asm in .c files. Headers (bitops.h, uaccess.h, atomic.h, bug.h) which had their own such compatibility macros are changed to use asm-compat.h. ppc_asm.h is now for use in .S files *only*, and a #error enforces that. As such, we're a lot more careless about namespace pollution here than in asm-compat.h. While we're at it, this patch adds a call to the PPC405_ERR77 macro in futex.h which should have had it already, but didn't. Built and booted on pSeries, Maple and iSeries (ARCH=powerpc). Built for 32-bit powermac (ARCH=powerpc) and Walnut (ARCH=ppc). Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
136 lines
3.2 KiB
ArmAsm
136 lines
3.2 KiB
ArmAsm
/*
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* Copyright (C) 1996 Paul Mackerras.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* NOTE: assert(sizeof(buf) > 23 * sizeof(long))
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*/
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#include <asm/processor.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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_GLOBAL(xmon_setjmp)
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mflr r0
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PPC_STL r0,0(r3)
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PPC_STL r1,SZL(r3)
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PPC_STL r2,2*SZL(r3)
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mfcr r0
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PPC_STL r0,3*SZL(r3)
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PPC_STL r13,4*SZL(r3)
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PPC_STL r14,5*SZL(r3)
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PPC_STL r15,6*SZL(r3)
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PPC_STL r16,7*SZL(r3)
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PPC_STL r17,8*SZL(r3)
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PPC_STL r18,9*SZL(r3)
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PPC_STL r19,10*SZL(r3)
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PPC_STL r20,11*SZL(r3)
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PPC_STL r21,12*SZL(r3)
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PPC_STL r22,13*SZL(r3)
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PPC_STL r23,14*SZL(r3)
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PPC_STL r24,15*SZL(r3)
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PPC_STL r25,16*SZL(r3)
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PPC_STL r26,17*SZL(r3)
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PPC_STL r27,18*SZL(r3)
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PPC_STL r28,19*SZL(r3)
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PPC_STL r29,20*SZL(r3)
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PPC_STL r30,21*SZL(r3)
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PPC_STL r31,22*SZL(r3)
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li r3,0
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blr
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_GLOBAL(xmon_longjmp)
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PPC_LCMPI r4,0
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bne 1f
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li r4,1
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1: PPC_LL r13,4*SZL(r3)
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PPC_LL r14,5*SZL(r3)
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PPC_LL r15,6*SZL(r3)
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PPC_LL r16,7*SZL(r3)
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PPC_LL r17,8*SZL(r3)
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PPC_LL r18,9*SZL(r3)
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PPC_LL r19,10*SZL(r3)
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PPC_LL r20,11*SZL(r3)
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PPC_LL r21,12*SZL(r3)
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PPC_LL r22,13*SZL(r3)
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PPC_LL r23,14*SZL(r3)
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PPC_LL r24,15*SZL(r3)
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PPC_LL r25,16*SZL(r3)
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PPC_LL r26,17*SZL(r3)
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PPC_LL r27,18*SZL(r3)
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PPC_LL r28,19*SZL(r3)
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PPC_LL r29,20*SZL(r3)
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PPC_LL r30,21*SZL(r3)
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PPC_LL r31,22*SZL(r3)
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PPC_LL r0,3*SZL(r3)
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mtcrf 0x38,r0
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PPC_LL r0,0(r3)
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PPC_LL r1,SZL(r3)
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PPC_LL r2,2*SZL(r3)
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mtlr r0
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mr r3,r4
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blr
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/*
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* Grab the register values as they are now.
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* This won't do a particularily good job because we really
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* want our caller's caller's registers, and our caller has
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* already executed its prologue.
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* ToDo: We could reach back into the caller's save area to do
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* a better job of representing the caller's state (note that
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* that will be different for 32-bit and 64-bit, because of the
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* different ABIs, though).
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*/
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_GLOBAL(xmon_save_regs)
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PPC_STL r0,0*SZL(r3)
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PPC_STL r2,2*SZL(r3)
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PPC_STL r3,3*SZL(r3)
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PPC_STL r4,4*SZL(r3)
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PPC_STL r5,5*SZL(r3)
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PPC_STL r6,6*SZL(r3)
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PPC_STL r7,7*SZL(r3)
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PPC_STL r8,8*SZL(r3)
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PPC_STL r9,9*SZL(r3)
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PPC_STL r10,10*SZL(r3)
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PPC_STL r11,11*SZL(r3)
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PPC_STL r12,12*SZL(r3)
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PPC_STL r13,13*SZL(r3)
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PPC_STL r14,14*SZL(r3)
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PPC_STL r15,15*SZL(r3)
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PPC_STL r16,16*SZL(r3)
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PPC_STL r17,17*SZL(r3)
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PPC_STL r18,18*SZL(r3)
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PPC_STL r19,19*SZL(r3)
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PPC_STL r20,20*SZL(r3)
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PPC_STL r21,21*SZL(r3)
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PPC_STL r22,22*SZL(r3)
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PPC_STL r23,23*SZL(r3)
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PPC_STL r24,24*SZL(r3)
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PPC_STL r25,25*SZL(r3)
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PPC_STL r26,26*SZL(r3)
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PPC_STL r27,27*SZL(r3)
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PPC_STL r28,28*SZL(r3)
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PPC_STL r29,29*SZL(r3)
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PPC_STL r30,30*SZL(r3)
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PPC_STL r31,31*SZL(r3)
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/* go up one stack frame for SP */
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PPC_LL r4,0(r1)
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PPC_STL r4,1*SZL(r3)
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/* get caller's LR */
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PPC_LL r0,LRSAVE(r4)
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PPC_STL r0,_NIP-STACK_FRAME_OVERHEAD(r3)
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PPC_STL r0,_LINK-STACK_FRAME_OVERHEAD(r3)
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mfmsr r0
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PPC_STL r0,_MSR-STACK_FRAME_OVERHEAD(r3)
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mfctr r0
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PPC_STL r0,_CTR-STACK_FRAME_OVERHEAD(r3)
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mfxer r0
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PPC_STL r0,_XER-STACK_FRAME_OVERHEAD(r3)
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mfcr r0
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PPC_STL r0,_CCR-STACK_FRAME_OVERHEAD(r3)
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li r0,0
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PPC_STL r0,_TRAP-STACK_FRAME_OVERHEAD(r3)
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blr
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