kernel_optimize_test/drivers/memory
Arnd Bergmann 0d583273b4 Merge branch 'baikal/drivers' into arm/drivers
[arnd: This is a patch series from Serge Semin to add a few drivers
 that don't have any other subsystem maintainer tree to go through,
 so I'm picking them up through the soc tree, full series description
 from the mailing list below]

Baikal-T1 SoC CPU is based on two MIPS Warrior P5600 cores. Their main
memory Non-Coherent IO interface is connected to the OCP2AXI bridge,
which in turn is then connected to the DW AMBA 3 AXI Interconnect (so
called Main Interconnect) with nine masters and four slaves ports. Main
Interconnect is responsible for the AXI-bus traffic arbitration (QoS)
and its routing from one component to another. In addition there is
a Errors Handler Block (EHB) accesible by means of the Baikal-T1 SoC
System Controller responsible to detect AXI protocol errors and device
not responding situations built on top the interconnect. Baikal-T1 AXI-bus
driver included in this patchset will be responsible for working with that
functionality, though currently it doesn't support QoS tuning. Instead
it's capable of detecting the error events, reporting an info about
them to the system log, injecting artificial errors to test the driver
functionality. Since AXI Interconnect doesn't provide a way to find
out which devices are connected to it, so its DT node is supposed to
be compatible with "simple-bus" driver, while sub-nodes shall represent
the masters attached to the bus.

One of the AXI Interconnect slaves is an AXI-APB bridge used to access the
Baikal-T1 SoC subsystems CSRs. MMIO request from CPU and DMAC masters are
routed there if they are detected to be within [0x08000000 0x1FFFFFFF]
range of the physical memory. In case if an attempted APB transaction
stays with no response for a pre-defined time it will be detected by
the APB-bus Errors Handler Block (EHB), which will raise an interrupt,
then the bus gets freed for a next operation. The APB-bus driver provides
the interrupt handler to detect the erroneous address, update an errors
counter and prints an error message about the faulty address. The counter
and the APB-bus operations timeout can be accessed via corresponding sysfs
nodes. A dedicated sysfs-node can be also used to artificially cause the
bus errors described above. Since APB-bus is a platform bus, it doesn't
provide a way to detect slave devices connected to it, so similarly to
the AXI-bus it's also supposed to be compatible with "simple-bus" driver.

Aside from PCIe/SATA/DDR/I2C/EHB/CPU/reboot specific settings the
Baikal-T1 System Controller provides a MIPS P5600 CM2 L2-cache tuning
block. It is responsible for the setting up the Tag/Data/WS L2-to-RAM
latencies. The last small patch in this patchset provides a driver and
DT-schema-based binding for the described device. So that the latencies
can be tuned up by means of dedicated DT properties and sysfs nodes.

This patchset is rebased and tested on the mainline Linux kernel
5.7-rc4.

Changelog v2 (AXI/APB bus):
- Assign dual GPL/BSD licenses to the bindings.
- Use single lined copyright headers in the bindings.
- Replace "additionalProperties: false" property with
  "unevaluatedProperties: false" in the bindings.
- Don't use a multi-arg clock phandle reference in DT binding examples.
  Thus remove includes from there.
- Fix some commit message and Kconfig help text spelling.
- Move drivers from soc to the bus subsystem.
- Convert a simple EHB drivers to the Baikal-T1 AXI and APB bus ones.
- Convert APB bus driver to using regmap MMIO API.
- Use syscon regmap to access the AXI-bus erroneous address.
- Add reset line support.
- Add Main Interconnect clock support to the AXI-bus driver.
- Remove probe-status info string printout.
- Discard of_match_ptr() macro utilization.
- Don't print error-message if no platform IRQ found. Just return an
  error.
- Use generic FIELD_{GET,PREP} macros instead of handwritten ones in the
  AXI-bus driver.

Changelog v2 (l2 driver):
- Fix some commit message and Kconfig help text spelling.
- Move the driver to the memory subsystem.
- Assign dual GPL/BSD license to the DT binding.
- Use single lined copyright header in the binding.
- Discard reg property and syscon compatible string.
- Move "allOf" restrictions to the root level of the properties.
- The DT node is supposed to be a child of the Baikal-T1 system
  controller node. So regmap will be fetched from there.
- Use generic FIELD_{GET,PREP} macro.
- Remove probe-status info string printout.
- Since the driver depends on the OF config we can remove of_match_ptr()
  macro utilization.

Changelog v3:
- Combine l2 and AXI/APB bus patches in a single patchset.
- Retrieve AXI-bus QoS registers by resource name "qos".
- Discard CONFIG_OF dependency since there is none at compile-time.
- Add syscon EHB registers range to the AXI-bus reg property as optional
  entry.
- Fix invalid of_property_read_u32() return value test in the l2-ctl
  driver.
- Get the reg property back into the l2-ctl DT bindings even though the
  driver is using the parental syscon regmap.
- The l2-ctl DT schema will live separately from the system controller,
  but the corresponding sub-node of the later DT schema will $ref this
  one.
- Set non-default latencies in the l2-ctl DT example.

* baikal/drivers:
  memory: Add Baikal-T1 L2-cache Control Block driver
  bus: Add Baikal-T1 APB-bus driver
  bus: Add Baikal-T1 AXI-bus driver
  dt-bindings: bus: Add Baikal-T1 APB-bus binding
  dt-bindings: bus: Add Baikal-T1 AXI-bus binding

Link: https://lore.kernel.org/lkml/20200526130841.ap6qlxv7hqmabnh5@mobilestation/
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2020-05-28 14:18:11 +02:00
..
samsung memory: samsung: exynos5422-dmc: Reduce protected code area in IRQ handler 2020-05-12 15:11:47 +02:00
tegra memory: tegra: Correct debugfs clk rate-range on Tegra124 2020-03-11 15:24:16 +01:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
atmel-ebi.c memory: atmel-ebi: switch to SPDX license identifiers 2019-11-07 22:33:10 +01:00
atmel-sdramc.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 340 2019-06-05 17:37:07 +02:00
brcmstb_dpfe.c memory: brcmstb: dpfe: Fixup API version/commands for 7211 2019-10-18 12:11:59 -07:00
bt1-l2-ctl.c memory: Add Baikal-T1 L2-cache Control Block driver 2020-05-28 14:17:41 +02:00
da8xx-ddrctl.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
emif-asm-offsets.c ARM: OMAP2+: Fix build when using split object directories 2018-04-18 10:07:13 -07:00
emif.c memory: emif: remove set but not used variables 'cs1_used' and 'custom_configs' 2019-10-29 09:57:57 -07:00
emif.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
fsl_ifc.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 61 2019-05-24 17:36:45 +02:00
fsl-corenet-cf.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
jedec_ddr_data.c ARM: SoC-related driver updates 2019-07-19 17:13:56 -07:00
jedec_ddr.h memory: Extend of_memory with LPDDR3 support 2019-10-01 20:28:38 +02:00
jz4780-nemc.c The main MIPS changes for a pretty light v5.3 cycle, including: 2019-07-17 09:42:03 -07:00
Kconfig memory: Add Baikal-T1 L2-cache Control Block driver 2020-05-28 14:17:41 +02:00
Makefile memory: Add Baikal-T1 L2-cache Control Block driver 2020-05-28 14:17:41 +02:00
mtk-smi.c memory: mtk-smi: Add PM suspend and resume ops 2019-10-15 14:25:34 +02:00
mvebu-devbus.c memory: mvebu-devbus: convert to devm_platform_ioremap_resource 2020-01-08 10:39:25 +01:00
of_memory.c memory: Extend of_memory with LPDDR3 support 2019-10-01 20:28:38 +02:00
of_memory.h memory: Extend of_memory with LPDDR3 support 2019-10-01 20:28:38 +02:00
omap-gpmc.c Bulk GPIO changes for the v5.3 kernel cycle: 2019-07-09 09:07:00 -07:00
pl172.c memory: pl172: add ARM PrimeCell PL176 MPMC support 2015-09-29 22:19:02 +02:00
pl353-smc.c memory: pl353: Add driver for arm pl353 static memory controller 2018-12-13 16:07:04 +01:00
ti-aemif.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
ti-emif-pm.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174 2019-05-30 11:26:41 -07:00
ti-emif-sram-pm.S memory: ti-emif-sram: move driver-specific asm-offset.h to drivers/memory/ 2019-07-17 10:25:10 +09:00