forked from luck/tmp_suning_uos_patched
9713faecff
Both mci.mem_is_per_rank and mci.csbased denote the same thing: the memory controller is csrows based. Merge both fields into one. There's no need for the driver to actually fill it, as the core detects it by checking if one of the layers has the csrows type as part of the memory hierarchy: if (layers[i].type == EDAC_MC_LAYER_CHIP_SELECT) per_rank = true; Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: Borislav Petkov <bp@suse.de> |
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| .. | ||
| amd64_edac_dbg.c | ||
| amd64_edac_inj.c | ||
| amd64_edac.c | ||
| amd64_edac.h | ||
| amd76x_edac.c | ||
| amd8111_edac.c | ||
| amd8111_edac.h | ||
| amd8131_edac.c | ||
| amd8131_edac.h | ||
| cell_edac.c | ||
| cpc925_edac.c | ||
| e7xxx_edac.c | ||
| e752x_edac.c | ||
| edac_core.h | ||
| edac_device_sysfs.c | ||
| edac_device.c | ||
| edac_mc_sysfs.c | ||
| edac_mc.c | ||
| edac_module.c | ||
| edac_module.h | ||
| edac_pci_sysfs.c | ||
| edac_pci.c | ||
| edac_stub.c | ||
| ghes_edac.c | ||
| highbank_l2_edac.c | ||
| highbank_mc_edac.c | ||
| i7core_edac.c | ||
| i3000_edac.c | ||
| i3200_edac.c | ||
| i5000_edac.c | ||
| i5100_edac.c | ||
| i5400_edac.c | ||
| i7300_edac.c | ||
| i82443bxgx_edac.c | ||
| i82860_edac.c | ||
| i82875p_edac.c | ||
| i82975x_edac.c | ||
| Kconfig | ||
| Makefile | ||
| mce_amd_inj.c | ||
| mce_amd.c | ||
| mce_amd.h | ||
| mpc85xx_edac.c | ||
| mpc85xx_edac.h | ||
| mv64x60_edac.c | ||
| mv64x60_edac.h | ||
| octeon_edac-l2c.c | ||
| octeon_edac-lmc.c | ||
| octeon_edac-pc.c | ||
| octeon_edac-pci.c | ||
| pasemi_edac.c | ||
| ppc4xx_edac.c | ||
| ppc4xx_edac.h | ||
| r82600_edac.c | ||
| sb_edac.c | ||
| tile_edac.c | ||
| x38_edac.c | ||