kernel_optimize_test/arch/sh/kernel/cpu/sh3/serial-sh7720.c
Paul Mundt 64941d8930 sh: Fix up se7721 GPIOLIB=y build warnings.
Presently the SH7720/21 serial code uses asm/gpio.h to get at the CPU
GPIO port definitions, but in the case of GPIOLIB=y this also includes
references to generic GPIOLIB routines that we don't have any function
declarations for, tripping up on -Werror=implicit-function-declaration
with newer gcc versions:

  CC      arch/sh/kernel/cpu/sh3/serial-sh7720.o
In file included from include/linux/sh_pfc.h:14:0,
                 from arch/sh/include/asm/gpio.h:23,
                 from arch/sh/kernel/cpu/sh3/serial-sh7720.c:5:
include/asm-generic/gpio.h: In function 'gpio_get_value_cansleep':
include/asm-generic/gpio.h:220:2: error: implicit declaration of function '__gpio_get_value' [-Werror=implicit-function-declaration]
include/asm-generic/gpio.h: In function 'gpio_set_value_cansleep':
include/asm-generic/gpio.h:226:2: error: implicit declaration of function '__gpio_set_value' [-Werror=implicit-function-declaration]
In file included from arch/sh/include/asm/gpio.h:23:0,
                 from arch/sh/kernel/cpu/sh3/serial-sh7720.c:5:
include/linux/sh_pfc.h: At top level:
include/linux/sh_pfc.h:121:19: error: field 'chip' has incomplete type

Switch to using the cpu/ version for the port definitions explicitly.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2012-07-02 15:06:22 +09:00

38 lines
1.1 KiB
C

#include <linux/serial_sci.h>
#include <linux/serial_core.h>
#include <linux/io.h>
#include <cpu/serial.h>
#include <cpu/gpio.h>
static void sh7720_sci_init_pins(struct uart_port *port, unsigned int cflag)
{
unsigned short data;
if (cflag & CRTSCTS) {
/* enable RTS/CTS */
if (port->mapbase == 0xa4430000) { /* SCIF0 */
/* Clear PTCR bit 9-2; enable all scif pins but sck */
data = __raw_readw(PORT_PTCR);
__raw_writew((data & 0xfc03), PORT_PTCR);
} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
/* Clear PVCR bit 9-2 */
data = __raw_readw(PORT_PVCR);
__raw_writew((data & 0xfc03), PORT_PVCR);
}
} else {
if (port->mapbase == 0xa4430000) { /* SCIF0 */
/* Clear PTCR bit 5-2; enable only tx and rx */
data = __raw_readw(PORT_PTCR);
__raw_writew((data & 0xffc3), PORT_PTCR);
} else if (port->mapbase == 0xa4438000) { /* SCIF1 */
/* Clear PVCR bit 5-2 */
data = __raw_readw(PORT_PVCR);
__raw_writew((data & 0xffc3), PORT_PVCR);
}
}
}
struct plat_sci_port_ops sh7720_sci_port_ops = {
.init_pins = sh7720_sci_init_pins,
};