forked from luck/tmp_suning_uos_patched
336 lines
9.0 KiB
C
336 lines
9.0 KiB
C
/*
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* linux/arch/parisc/kernel/time.c
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*
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* Copyright (C) 1991, 1992, 1995 Linus Torvalds
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* Modifications for ARM (C) 1994, 1995, 1996,1997 Russell King
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* Copyright (C) 1999 SuSE GmbH, (Philipp Rumpf, prumpf@tux.org)
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*
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* 1994-07-02 Alan Modra
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* fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime
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* 1998-12-20 Updated NTP code according to technical memorandum Jan '96
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* "A Kernel Model for Precision Timekeeping" by Dave Mills
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*/
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/profile.h>
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#include <asm/uaccess.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/param.h>
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#include <asm/pdc.h>
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#include <asm/led.h>
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#include <linux/timex.h>
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static unsigned long clocktick __read_mostly; /* timer cycles per tick */
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#ifdef CONFIG_SMP
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extern void smp_do_timer(struct pt_regs *regs);
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#endif
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/*
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* We keep time on PA-RISC Linux by using the Interval Timer which is
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* a pair of registers; one is read-only and one is write-only; both
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* accessed through CR16. The read-only register is 32 or 64 bits wide,
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* and increments by 1 every CPU clock tick. The architecture only
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* guarantees us a rate between 0.5 and 2, but all implementations use a
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* rate of 1. The write-only register is 32-bits wide. When the lowest
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* 32 bits of the read-only register compare equal to the write-only
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* register, it raises a maskable external interrupt. Each processor has
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* an Interval Timer of its own and they are not synchronised.
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*
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* We want to generate an interrupt every 1/HZ seconds. So we program
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* CR16 to interrupt every @clocktick cycles. The it_value in cpu_data
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* is programmed with the intended time of the next tick. We can be
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* held off for an arbitrarily long period of time by interrupts being
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* disabled, so we may miss one or more ticks.
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*/
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irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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unsigned long now;
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unsigned long next_tick;
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unsigned long cycles_elapsed, ticks_elapsed;
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unsigned long cycles_remainder;
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unsigned int cpu = smp_processor_id();
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/* gcc can optimize for "read-only" case with a local clocktick */
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unsigned long cpt = clocktick;
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profile_tick(CPU_PROFILING);
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/* Initialize next_tick to the expected tick time. */
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next_tick = cpu_data[cpu].it_value;
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/* Get current interval timer.
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* CR16 reads as 64 bits in CPU wide mode.
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* CR16 reads as 32 bits in CPU narrow mode.
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*/
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now = mfctl(16);
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cycles_elapsed = now - next_tick;
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if ((cycles_elapsed >> 5) < cpt) {
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/* use "cheap" math (add/subtract) instead
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* of the more expensive div/mul method
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*/
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cycles_remainder = cycles_elapsed;
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ticks_elapsed = 1;
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while (cycles_remainder > cpt) {
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cycles_remainder -= cpt;
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ticks_elapsed++;
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}
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} else {
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cycles_remainder = cycles_elapsed % cpt;
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ticks_elapsed = 1 + cycles_elapsed / cpt;
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}
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/* Can we differentiate between "early CR16" (aka Scenario 1) and
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* "long delay" (aka Scenario 3)? I don't think so.
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*
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* We expected timer_interrupt to be delivered at least a few hundred
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* cycles after the IT fires. But it's arbitrary how much time passes
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* before we call it "late". I've picked one second.
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*/
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if (ticks_elapsed > HZ) {
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/* Scenario 3: very long delay? bad in any case */
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printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!"
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" cycles %lX rem %lX "
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" next/now %lX/%lX\n",
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cpu,
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cycles_elapsed, cycles_remainder,
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next_tick, now );
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}
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/* convert from "division remainder" to "remainder of clock tick" */
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cycles_remainder = cpt - cycles_remainder;
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/* Determine when (in CR16 cycles) next IT interrupt will fire.
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* We want IT to fire modulo clocktick even if we miss/skip some.
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* But those interrupts don't in fact get delivered that regularly.
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*/
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next_tick = now + cycles_remainder;
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cpu_data[cpu].it_value = next_tick;
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/* Skip one clocktick on purpose if we are likely to miss next_tick.
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* We want to avoid the new next_tick being less than CR16.
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* If that happened, itimer wouldn't fire until CR16 wrapped.
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* We'll catch the tick we missed on the tick after that.
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*/
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if (!(cycles_remainder >> 13))
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next_tick += cpt;
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/* Program the IT when to deliver the next interrupt. */
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/* Only bottom 32-bits of next_tick are written to cr16. */
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mtctl(next_tick, 16);
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/* Done mucking with unreliable delivery of interrupts.
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* Go do system house keeping.
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*/
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#ifdef CONFIG_SMP
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smp_do_timer(regs);
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#else
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update_process_times(user_mode(regs));
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#endif
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if (cpu == 0) {
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write_seqlock(&xtime_lock);
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do_timer(ticks_elapsed);
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write_sequnlock(&xtime_lock);
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}
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/* check soft power switch status */
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if (cpu == 0 && !atomic_read(&power_tasklet.count))
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tasklet_schedule(&power_tasklet);
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return IRQ_HANDLED;
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}
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unsigned long profile_pc(struct pt_regs *regs)
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{
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unsigned long pc = instruction_pointer(regs);
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if (regs->gr[0] & PSW_N)
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pc -= 4;
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#ifdef CONFIG_SMP
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if (in_lock_functions(pc))
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pc = regs->gr[2];
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#endif
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return pc;
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}
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EXPORT_SYMBOL(profile_pc);
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/*
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* Return the number of micro-seconds that elapsed since the last
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* update to wall time (aka xtime). The xtime_lock
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* must be at least read-locked when calling this routine.
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*/
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static inline unsigned long gettimeoffset (void)
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{
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#ifndef CONFIG_SMP
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/*
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* FIXME: This won't work on smp because jiffies are updated by cpu 0.
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* Once parisc-linux learns the cr16 difference between processors,
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* this could be made to work.
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*/
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unsigned long now;
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unsigned long prev_tick;
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unsigned long next_tick;
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unsigned long elapsed_cycles;
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unsigned long usec;
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unsigned long cpuid = smp_processor_id();
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unsigned long cpt = clocktick;
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next_tick = cpu_data[cpuid].it_value;
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now = mfctl(16); /* Read the hardware interval timer. */
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prev_tick = next_tick - cpt;
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/* Assume Scenario 1: "now" is later than prev_tick. */
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elapsed_cycles = now - prev_tick;
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/* aproximate HZ with shifts. Intended math is "(elapsed/clocktick) > HZ" */
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#if HZ == 1000
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if (elapsed_cycles > (cpt << 10) )
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#elif HZ == 250
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if (elapsed_cycles > (cpt << 8) )
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#elif HZ == 100
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if (elapsed_cycles > (cpt << 7) )
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#else
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#warn WTF is HZ set to anyway?
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if (elapsed_cycles > (HZ * cpt) )
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#endif
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{
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/* Scenario 3: clock ticks are missing. */
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printk (KERN_CRIT "gettimeoffset(CPU %ld): missing %ld ticks!"
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" cycles %lX prev/now/next %lX/%lX/%lX clock %lX\n",
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cpuid, elapsed_cycles / cpt,
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elapsed_cycles, prev_tick, now, next_tick, cpt);
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}
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/* FIXME: Can we improve the precision? Not with PAGE0. */
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usec = (elapsed_cycles * 10000) / PAGE0->mem_10msec;
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return usec;
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#else
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return 0;
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#endif
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}
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void
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do_gettimeofday (struct timeval *tv)
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{
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unsigned long flags, seq, usec, sec;
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/* Hold xtime_lock and adjust timeval. */
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do {
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seq = read_seqbegin_irqsave(&xtime_lock, flags);
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usec = gettimeoffset();
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sec = xtime.tv_sec;
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usec += (xtime.tv_nsec / 1000);
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} while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
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/* Move adjusted usec's into sec's. */
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while (usec >= USEC_PER_SEC) {
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usec -= USEC_PER_SEC;
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++sec;
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}
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/* Return adjusted result. */
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tv->tv_sec = sec;
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tv->tv_usec = usec;
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}
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EXPORT_SYMBOL(do_gettimeofday);
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int
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do_settimeofday (struct timespec *tv)
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{
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time_t wtm_sec, sec = tv->tv_sec;
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long wtm_nsec, nsec = tv->tv_nsec;
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if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
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return -EINVAL;
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write_seqlock_irq(&xtime_lock);
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{
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/*
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* This is revolting. We need to set "xtime"
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* correctly. However, the value in this location is
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* the value at the most recent update of wall time.
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* Discover what correction gettimeofday would have
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* done, and then undo it!
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*/
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nsec -= gettimeoffset() * 1000;
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wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
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wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
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set_normalized_timespec(&xtime, sec, nsec);
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set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
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ntp_clear();
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}
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write_sequnlock_irq(&xtime_lock);
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clock_was_set();
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return 0;
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}
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EXPORT_SYMBOL(do_settimeofday);
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/*
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* XXX: We can do better than this.
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* Returns nanoseconds
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*/
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unsigned long long sched_clock(void)
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{
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return (unsigned long long)jiffies * (1000000000 / HZ);
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}
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void __init start_cpu_itimer(void)
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{
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unsigned int cpu = smp_processor_id();
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unsigned long next_tick = mfctl(16) + clocktick;
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mtctl(next_tick, 16); /* kick off Interval Timer (CR16) */
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cpu_data[cpu].it_value = next_tick;
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}
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void __init time_init(void)
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{
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static struct pdc_tod tod_data;
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clocktick = (100 * PAGE0->mem_10msec) / HZ;
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start_cpu_itimer(); /* get CPU 0 started */
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if(pdc_tod_read(&tod_data) == 0) {
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write_seqlock_irq(&xtime_lock);
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xtime.tv_sec = tod_data.tod_sec;
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xtime.tv_nsec = tod_data.tod_usec * 1000;
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set_normalized_timespec(&wall_to_monotonic,
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-xtime.tv_sec, -xtime.tv_nsec);
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write_sequnlock_irq(&xtime_lock);
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} else {
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printk(KERN_ERR "Error reading tod clock\n");
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xtime.tv_sec = 0;
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xtime.tv_nsec = 0;
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}
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}
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