forked from luck/tmp_suning_uos_patched
8ca302e9c6
SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
- Andres Färber adds initial support for the Actions Semi S500 (a.k.a.
'owl') platform, a close relative of the S900 platform he adds for arm64.
- in mach-omap2, we remove more legacy code
- Rockchips gains support for the RV1108 SoC designed for camera
applications.
- For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
- Minor updates for other platforms, including davinci, s3c64xx,
prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"SoC platform changes (arch/arm/mach-*). This merge window, the bulk is
for a few platforms:
- Andres Färber adds initial support for the Actions Semi S500 (aka
'owl') platform, a close relative of the S900 platform he adds for
arm64.
- in mach-omap2, we remove more legacy code
- Rockchips gains support for the RV1108 SoC designed for camera
applications.
- For Atmel, we gain support for MMU-less SoCs (SAME70/V71/S70/V70)
- Minor updates for other platforms, including davinci, s3c64xx,
prima2, stm32, broadcom nsp, amlogic, pxa, imx and renesas"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
ARM: owl: smp: Drop bogus holding pen
ARM: owl: Drop custom machine
ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3
soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating
soc: actions: Add Owl SPS
dt-bindings: power: Add Owl SPS power domains
MAINTAINERS: Update Actions Semi section with SPS
ARM: owl: Implement CPU enable-method for S500
MAINTAINERS: Add Actions Semi Owl section
ARM: Prepare Actions Semi S500
ARM: socfpga: Increase max number of GPIOs
ARM: stm32: Introduce MACH_STM32F469 flag
ARM: prima2: remove redundant select CPU_V7
ARM: davinci: fix const warnings
ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ALWAYS_ON
ARM: OMAP4: hwmod_data: add SHAM crypto accelerator
ARM: OMAP4: hwmod data: add des
ARM: OMAP4: hwmod data: add aes2
ARM: OMAP4: hwmod data: add aes1
ARM: pxa: Delete an error message for a failed memory allocation in pxa3xx_u2d_probe()
...
84 lines
2.1 KiB
C
84 lines
2.1 KiB
C
/*
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* Device Tree support for Rockchip SoCs
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*
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* Copyright (c) 2013 MundoReader S.L.
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* Author: Heiko Stuebner <heiko@sntech.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/of_platform.h>
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#include <linux/irqchip.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/mfd/syscon.h>
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#include <linux/regmap.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/hardware/cache-l2x0.h>
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#include "core.h"
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#include "pm.h"
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#define RK3288_TIMER6_7_PHYS 0xff810000
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static void __init rockchip_timer_init(void)
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{
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if (of_machine_is_compatible("rockchip,rk3288")) {
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void __iomem *reg_base;
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/*
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* Most/all uboot versions for rk3288 don't enable timer7
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* which is needed for the architected timer to work.
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* So make sure it is running during early boot.
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*/
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reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
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if (reg_base) {
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writel(0, reg_base + 0x30);
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writel(0xffffffff, reg_base + 0x20);
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writel(0xffffffff, reg_base + 0x24);
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writel(1, reg_base + 0x30);
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dsb();
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iounmap(reg_base);
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} else {
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pr_err("rockchip: could not map timer7 registers\n");
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}
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}
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of_clk_init(NULL);
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timer_probe();
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}
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static void __init rockchip_dt_init(void)
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{
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rockchip_suspend_init();
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}
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static const char * const rockchip_board_dt_compat[] = {
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"rockchip,rk2928",
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"rockchip,rk3066a",
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"rockchip,rk3066b",
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"rockchip,rk3188",
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"rockchip,rk3228",
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"rockchip,rk3288",
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"rockchip,rv1108",
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NULL,
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};
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DT_MACHINE_START(ROCKCHIP_DT, "Rockchip (Device Tree)")
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.l2c_aux_val = 0,
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.l2c_aux_mask = ~0,
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.init_time = rockchip_timer_init,
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.dt_compat = rockchip_board_dt_compat,
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.init_machine = rockchip_dt_init,
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MACHINE_END
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