forked from luck/tmp_suning_uos_patched
09831ca734
Original port to early 2.6 kernel using TI COFF toolchain. Brought up to date by Mark Salter <msalter@redhat.com> Signed-off-by: Aurelien Jacquiot <a-jacquiot@ti.com> Signed-off-by: Mark Salter <msalter@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
88 lines
2.6 KiB
ArmAsm
88 lines
2.6 KiB
ArmAsm
;; Copyright 2011 Free Software Foundation, Inc.
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;; Contributed by Bernd Schmidt <bernds@codesourcery.com>.
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;;
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;; This program is free software; you can redistribute it and/or modify
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;; it under the terms of the GNU General Public License as published by
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;; the Free Software Foundation; either version 2 of the License, or
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;; (at your option) any later version.
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;;
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;; This program is distributed in the hope that it will be useful,
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;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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;; GNU General Public License for more details.
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;;
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;; You should have received a copy of the GNU General Public License
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;; along with this program; if not, write to the Free Software
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;; Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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#include <linux/linkage.h>
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.text
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ENTRY(__c6xabi_divremu)
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;; We use a series of up to 31 subc instructions. First, we find
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;; out how many leading zero bits there are in the divisor. This
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;; gives us both a shift count for aligning (shifting) the divisor
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;; to the, and the number of times we have to execute subc.
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;; At the end, we have both the remainder and most of the quotient
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;; in A4. The top bit of the quotient is computed first and is
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;; placed in A2.
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;; Return immediately if the dividend is zero. Setting B4 to 1
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;; is a trick to allow us to leave the following insns in the jump
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;; delay slot without affecting the result.
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mv .s2x A4, B1
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[b1] lmbd .l2 1, B4, B1
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||[!b1] b .s2 B3 ; RETURN A
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||[!b1] mvk .d2 1, B4
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||[!b1] zero .s1 A5
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mv .l1x B1, A6
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|| shl .s2 B4, B1, B4
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;; The loop performs a maximum of 28 steps, so we do the
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;; first 3 here.
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cmpltu .l1x A4, B4, A2
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[!A2] sub .l1x A4, B4, A4
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|| shru .s2 B4, 1, B4
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|| xor .s1 1, A2, A2
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shl .s1 A2, 31, A2
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|| [b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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;; RETURN A may happen here (note: must happen before the next branch)
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__divremu0:
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cmpgt .l2 B1, 7, B0
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|| [b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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|| [b0] b .s1 __divremu0
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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[b1] subc .l1x A4,B4,A4
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|| [b1] add .s2 -1, B1, B1
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;; loop backwards branch happens here
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ret .s2 B3
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|| mvk .s1 32, A1
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sub .l1 A1, A6, A6
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|| extu .s1 A4, A6, A5
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shl .s1 A4, A6, A4
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shru .s1 A4, 1, A4
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|| sub .l1 A6, 1, A6
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or .l1 A2, A4, A4
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shru .s1 A4, A6, A4
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nop
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ENDPROC(__c6xabi_divremu)
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